Searched refs:num_tx_sched_layers (Results 1 – 3 of 3) sorted by relevance
776 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) { in ice_sched_clear_rl_prof()875 hw->num_tx_sched_layers = 0; in ice_sched_cleanup_all()1124 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET; in ice_sched_get_qgrp_layer()1141 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) { in ice_sched_get_vsi_layer()1142 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET; in ice_sched_get_vsi_layer()1163 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) { in ice_sched_get_agg_layer()1164 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET; in ice_sched_get_agg_layer()1357 hw->num_tx_sched_layers = le16_to_cpu(buf->sched_props.logical_levels); in ice_sched_query_res_alloc()1370 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) { in ice_sched_query_res_alloc()1376 (hw->num_tx_sched_layers * in ice_sched_query_res_alloc()[all …]
851 u8 num_tx_sched_layers; member
4722 status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node, NULL); in ice_ena_vsi_txq()4957 ret = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, in ice_ena_vsi_rdma_qset()