Searched refs:num_entries_per_clk (Results 1 – 4 of 4) sorted by relevance
159 …struct clk_limit_num_entries *num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entrie… in dcn32_init_clocks() local184 &num_entries_per_clk->num_dcfclk_levels); in dcn32_init_clocks()190 &num_entries_per_clk->num_socclk_levels); in dcn32_init_clocks()197 &num_entries_per_clk->num_dtbclk_levels); in dcn32_init_clocks()205 &num_entries_per_clk->num_dispclk_levels); in dcn32_init_clocks()206 num_levels = num_entries_per_clk->num_dispclk_levels; in dcn32_init_clocks()212 if (num_entries_per_clk->num_dcfclk_levels && in dcn32_init_clocks()213 num_entries_per_clk->num_dtbclk_levels && in dcn32_init_clocks()214 num_entries_per_clk->num_dispclk_levels) in dcn32_init_clocks()841 …struct clk_limit_num_entries *num_entries_per_clk = &clk_mgr_base->bw_params->clk_table.num_entrie… in dcn32_get_memclk_states_from_smu() local[all …]
113 struct clk_limit_num_entries num_entries_per_clk; member
403 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = num_uclk_dpms; in build_synthetic_soc_states()404 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()
2164 …int min_dram_speed_mts_offset = dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_l… in dcn32_calculate_wm_and_dlg_fpu()2508 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = num_uclk_dpms; in build_synthetic_soc_states()2509 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = num_fclk_dpms; in build_synthetic_soc_states()3155 int num_mclk_levels = dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn32_override_min_req_memclk()