Home
last modified time | relevance | path

Searched refs:num_dwb (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hwseq.h52 unsigned int num_dwb,
H A Ddcn30_hwseq.c267 unsigned int num_dwb, in dcn30_mmhubbub_warmup() argument
275 for (i = 0; i < num_dwb; i++) { in dcn30_mmhubbub_warmup()
304 for (i = 0; i < num_dwb; i++) { in dcn30_mmhubbub_warmup()
387 ASSERT(stream->num_wb_info <= dc->res_pool->res_cap->num_dwb); in dcn30_program_all_writeback_pipes_in_tree()
417 ASSERT(wb_info.dwb_pipe_inst < dc->res_pool->res_cap->num_dwb); in dcn30_program_all_writeback_pipes_in_tree()
H A Ddcn30_resource.c674 .num_dwb = 1,
1137 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn30_resource_destruct()
1216 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn30_dwbc_create()
1241 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn30_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dresource.h51 int num_dwb; member
H A Dhw_sequencer.h314 unsigned int num_dwb,
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/
H A Ddcn302_resource.c125 .num_dwb = 1,
708 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn302_dwbc_create()
743 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn302_mmhubbub_create()
1059 for (i = 0; i < pool->res_cap->num_dwb; i++) { in dcn302_resource_destruct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/
H A Ddcn303_resource.c104 .num_dwb = 1,
651 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn303_dwbc_create()
686 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn303_mmhubbub_create()
985 for (i = 0; i < pool->res_cap->num_dwb; i++) { in dcn303_resource_destruct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.c645 .num_dwb = 1,
1107 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn301_destruct()
1175 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn301_dwbc_create()
1200 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn301_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c578 .num_dwb = 1,
592 .num_dwb = 1,
604 .num_dwb = 1,
745 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn21_resource_destruct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_stream.c567 int num_dwb, in dc_stream_warmup_writeback() argument
571 return dc->hwss.mmhubbub_warmup(dc, num_dwb, wb_info); in dc_stream_warmup_writeback()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c818 .num_dwb = 1,
1437 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn316_resource_destruct()
1510 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dwbc_create()
1535 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_stream.h466 int num_dwb,
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c821 .num_dwb = 1,
1439 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn315_resource_destruct()
1512 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dwbc_create()
1537 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/
H A Ddcn321_resource.c649 .num_dwb = 1,
1424 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn321_resource_destruct()
1485 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn321_dwbc_create()
1514 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn321_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_resource.c833 .num_dwb = 1,
1511 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn314_resource_destruct()
1587 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dwbc_create()
1612 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_resource.c822 .num_dwb = 1,
1439 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn31_resource_destruct()
1515 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dwbc_create()
1540 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c665 .num_dwb = 1,
703 .num_dwb = 1,
1151 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn20_resource_destruct()
2233 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn20_dwbc_create()
2256 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn20_mmhubbub_create()
H A Ddcn20_hwseq.c2910 for (i = 0; i < res_pool->res_cap->num_dwb; i++) in dcn20_fpga_init_hw()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.c650 .num_dwb = 1,
1439 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn32_resource_destruct()
1500 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn32_dwbc_create()
1529 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn32_mmhubbub_create()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_hwseq.c327 for (i = 0; i < res_pool->res_cap->num_dwb; i++) in dcn201_init_hw()