Searched refs:new_cdclk_state (Results 1 – 2 of 2) sorted by relevance
2364 const struct intel_cdclk_state *new_cdclk_state = in intel_cdclk_pcode_pre_notify() local2370 &new_cdclk_state->actual) && in intel_cdclk_pcode_pre_notify()2371 new_cdclk_state->active_pipes == in intel_cdclk_pcode_pre_notify()2378 change_cdclk = new_cdclk_state->actual.cdclk != old_cdclk_state->actual.cdclk; in intel_cdclk_pcode_pre_notify()2379 update_pipe_count = hweight8(new_cdclk_state->active_pipes) > in intel_cdclk_pcode_pre_notify()2389 cdclk = max(new_cdclk_state->actual.cdclk, old_cdclk_state->actual.cdclk); in intel_cdclk_pcode_pre_notify()2398 num_active_pipes = hweight8(new_cdclk_state->active_pipes); in intel_cdclk_pcode_pre_notify()2407 const struct intel_cdclk_state *new_cdclk_state = in intel_cdclk_pcode_post_notify() local2415 voltage_level = new_cdclk_state->actual.voltage_level; in intel_cdclk_pcode_post_notify()2417 update_cdclk = new_cdclk_state->actual.cdclk != old_cdclk_state->actual.cdclk; in intel_cdclk_pcode_post_notify()[all …]
268 const struct intel_cdclk_state *new_cdclk_state, *old_cdclk_state; in intel_pmdemand_needs_update() local289 new_cdclk_state = intel_atomic_get_new_cdclk_state(state); in intel_pmdemand_needs_update()291 if (new_cdclk_state && in intel_pmdemand_needs_update()292 (new_cdclk_state->actual.cdclk != in intel_pmdemand_needs_update()294 new_cdclk_state->actual.voltage_level != in intel_pmdemand_needs_update()310 const struct intel_cdclk_state *new_cdclk_state; in intel_pmdemand_atomic_check() local341 new_cdclk_state = intel_atomic_get_cdclk_state(state); in intel_pmdemand_atomic_check()342 if (IS_ERR(new_cdclk_state)) in intel_pmdemand_atomic_check()343 return PTR_ERR(new_cdclk_state); in intel_pmdemand_atomic_check()346 new_cdclk_state->actual.voltage_level; in intel_pmdemand_atomic_check()[all …]