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Searched refs:mxcsr (Results 1 – 25 of 30) sorted by relevance

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/openbmc/qemu/tests/tcg/i386/
H A Dtest-i386-sse-exceptions.c54 uint32_t mxcsr; in main() local
60 __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); in main()
61 if ((mxcsr & EXC) != IE) { in main()
68 __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); in main()
69 if ((mxcsr & EXC) != (UE | PE)) { in main()
76 __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); in main()
77 if ((mxcsr & EXC) != (OE | PE)) { in main()
84 __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); in main()
85 if ((mxcsr & EXC) != PE) { in main()
92 __asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); in main()
[all …]
/openbmc/linux/arch/x86/kernel/fpu/
H A Dcore.c399 if (ustate->fxsave.mxcsr & ~mxcsr_feature_mask) in fpu_copy_uabi_to_guest_fpstate()
485 fpstate->regs.fxsave.mxcsr = MXCSR_DEFAULT; in fpstate_init_fxstate()
872 unsigned short mxcsr = MXCSR_DEFAULT; in fpu__exception_code() local
875 mxcsr = fpu->fpstate->regs.fxsave.mxcsr; in fpu__exception_code()
877 err = ~(mxcsr >> 7) & mxcsr; in fpu__exception_code()
H A Dxstate.c1070 const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr); in __copy_xstate_to_uabi_buf()
1102 &to, &xsave->i387.mxcsr, &xinit->i387.mxcsr, in __copy_xstate_to_uabi_buf()
1258 u32 mxcsr[2]; in copy_uabi_to_xstate() local
1260 offset = offsetof(struct fxregs_state, mxcsr); in copy_uabi_to_xstate()
1261 if (copy_from_buffer(mxcsr, offset, sizeof(mxcsr), kbuf, ubuf)) in copy_uabi_to_xstate()
1265 if (mxcsr[0] & ~mxcsr_feature_mask) in copy_uabi_to_xstate()
1270 xsave->i387.mxcsr = mxcsr[0]; in copy_uabi_to_xstate()
1271 xsave->i387.mxcsr_mask = mxcsr[1]; in copy_uabi_to_xstate()
H A Dlegacy.h9 static inline void ldmxcsr(u32 mxcsr) in ldmxcsr() argument
11 asm volatile("ldmxcsr %0" :: "m" (mxcsr)); in ldmxcsr()
H A Dsignal.c405 if (fpregs->fxsave.mxcsr & ~mxcsr_feature_mask) in __fpu_restore_sig()
409 fpregs->fxsave.mxcsr &= mxcsr_feature_mask; in __fpu_restore_sig()
H A Dregset.c110 if (newstate.mxcsr & ~mxcsr_feature_mask) in xfpregs_set()
/openbmc/qemu/target/i386/
H A Dxsave_helper.c41 legacy->mxcsr = env->mxcsr; in x86_cpu_xsave_all_areas()
173 env->mxcsr = legacy->mxcsr; in x86_cpu_xrstor_all_areas()
H A Dcpu.h1557 uint32_t mxcsr; member
1794 uint32_t mxcsr; member
2625 static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) in cpu_set_mxcsr() argument
2627 env->mxcsr = mxcsr; in cpu_set_mxcsr()
H A Dgdbstub.c206 return gdb_get_reg32(mem_buf, env->mxcsr); in x86_cpu_gdb_read_register()
H A Dcpu-dump.c498 env->mxcsr); in x86_cpu_dump_state()
H A Dmachine.c1691 VMSTATE_UINT32(env.mxcsr, X86CPU),
/openbmc/linux/arch/x86/include/uapi/asm/
H A Dsigcontext.h123 __u32 mxcsr; member
157 __u32 mxcsr; member
H A Dkvm.h179 __u32 mxcsr; member
/openbmc/linux/arch/x86/include/asm/
H A Duser_32.h65 long mxcsr; member
H A Duser_64.h59 __u32 mxcsr; member
H A Duser32.h29 int mxcsr; member
H A Dsvm.h450 u32 mxcsr; member
/openbmc/qemu/target/i386/tcg/
H A Dtcg-cpu.h68 QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, legacy.mxcsr) != XSAVE_MXCSR_OFFSET);
H A Dfpu_helper.c2600 access_stl(ac, ptr + XO(legacy.mxcsr), env->mxcsr); in do_xsave_mxcsr()
2817 cpu_set_mxcsr(env, access_ldl(ac, ptr + XO(legacy.mxcsr))); in do_xrstor_mxcsr()
3222 uint32_t mxcsr = env->mxcsr; in update_mxcsr_status() local
3226 rnd_type = (mxcsr & SSE_RC_MASK) >> SSE_RC_SHIFT; in update_mxcsr_status()
3230 set_float_exception_flags((mxcsr & FPUS_IE ? float_flag_invalid : 0) | in update_mxcsr_status()
3231 (mxcsr & FPUS_ZE ? float_flag_divbyzero : 0) | in update_mxcsr_status()
3232 (mxcsr & FPUS_OE ? float_flag_overflow : 0) | in update_mxcsr_status()
3233 (mxcsr & FPUS_UE ? float_flag_underflow : 0) | in update_mxcsr_status()
3234 (mxcsr & FPUS_PE ? float_flag_inexact : 0), in update_mxcsr_status()
3238 set_flush_inputs_to_zero((mxcsr & SSE_DAZ) ? 1 : 0, &env->sse_status); in update_mxcsr_status()
[all …]
/openbmc/qemu/dump/
H A Dwin_dump.c308 .MxCsr = env->mxcsr, in patch_and_save_context()
344 .MxCsr = env->mxcsr, in patch_and_save_context()
/openbmc/linux/arch/x86/include/asm/fpu/
H A Dtypes.h51 u32 mxcsr; /* MXCSR Register State */ member
/openbmc/linux/tools/arch/x86/include/uapi/asm/
H A Dkvm.h179 __u32 mxcsr; member
/openbmc/qemu/target/i386/nvmm/
H A Dnvmm-all.c157 state->fpu.fx_mxcsr = env->mxcsr; in nvmm_set_registers()
313 env->mxcsr = state->fpu.fx_mxcsr; in nvmm_get_registers()
/openbmc/qemu/linux-headers/asm-x86/
H A Dkvm.h180 __u32 mxcsr; member
/openbmc/qemu/target/i386/whpx/
H A Dwhpx-all.c504 vcxt.values[idx].XmmControlStatus.XmmStatusControl = env->mxcsr; in whpx_set_registers()
728 env->mxcsr = vcxt.values[idx].XmmControlStatus.XmmStatusControl; in whpx_get_registers()

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