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Searched refs:mr_cache (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dmain.c116 .mr_cache[0] = {
120 .mr_cache[1] = {
124 .mr_cache[2] = {
128 .mr_cache[3] = {
132 .mr_cache[4] = {
136 .mr_cache[5] = {
140 .mr_cache[6] = {
144 .mr_cache[7] = {
148 .mr_cache[8] = {
152 .mr_cache[9] = {
[all …]
/openbmc/linux/include/linux/mlx5/
H A Ddriver.h751 } mr_cache[MAX_MKEY_CACHE_ENTRIES]; member
/openbmc/linux/drivers/infiniband/hw/mlx5/
H A Dmr.c929 ent->limit = dev->mdev->profile.mr_cache[order].limit; in mlx5r_cache_create_ent_locked()