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Searched refs:mpwlgcr (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/include/
H A Dfsl_mmdc.h103 u32 mpwlgcr; member
/openbmc/u-boot/drivers/ddr/fsl/
H A Dfsl_mmdc.c97 set_wait_for_bits_clear(&mmdc->mpwlgcr, MPWLGCR_HW_WL_EN, in mmdc_init()
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dddr.c159 writel(0x00000001, &mmdc0->mpwlgcr); in mmdc_do_write_level_calibration()
165 wait_for_bit_le32(&mmdc0->mpwlgcr, 1 << 0, 0, 100, 0); in mmdc_do_write_level_calibration()
171 if (readl(&mmdc0->mpwlgcr) & 0x00000F00) in mmdc_do_write_level_calibration()
174 if (readl(&mmdc1->mpwlgcr) & 0x00000F00) in mmdc_do_write_level_calibration()
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dmx6-ddr.h75 u32 mpwlgcr; member