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Searched refs:mpll_cfg (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/rockchip/
H A Ddw_hdmi-rockchip.c257 const struct dw_hdmi_mpll_config *mpll_cfg = rockchip_mpll_cfg; in dw_hdmi_rockchip_mode_valid() local
269 for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) { in dw_hdmi_rockchip_mode_valid()
274 if (exact_match && pclk == mpll_cfg[i].mpixelclock) in dw_hdmi_rockchip_mode_valid()
280 if (!exact_match && pclk <= mpll_cfg[i].mpixelclock) in dw_hdmi_rockchip_mode_valid()
455 .mpll_cfg = rockchip_mpll_cfg,
472 .mpll_cfg = rockchip_mpll_cfg,
492 .mpll_cfg = rockchip_mpll_cfg,
510 .mpll_cfg = rockchip_mpll_cfg,
523 .mpll_cfg = rockchip_mpll_cfg,
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_link_encoder.c53 static struct mpll_cfg dcn21_mpll_cfg_ref[] = {
185 cfg->mpll_cfg = dcn21_mpll_cfg_ref[0]; in update_cfg_data()
188 cfg->mpll_cfg = dcn21_mpll_cfg_ref[1]; in update_cfg_data()
191 cfg->mpll_cfg = dcn21_mpll_cfg_ref[2]; in update_cfg_data()
194 cfg->mpll_cfg = dcn21_mpll_cfg_ref[3]; in update_cfg_data()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.c58 static struct mpll_cfg dcn2_mpll_cfg[] = {
225 cfg->mpll_cfg = dcn2_mpll_cfg[0]; in update_cfg_data()
228 cfg->mpll_cfg = dcn2_mpll_cfg[1]; in update_cfg_data()
231 cfg->mpll_cfg = dcn2_mpll_cfg[2]; in update_cfg_data()
234 cfg->mpll_cfg = dcn2_mpll_cfg[3]; in update_cfg_data()
H A Ddcn20_link_encoder.h246 struct mpll_cfg { struct
290 struct mpll_cfg mpll_cfg; argument
/openbmc/u-boot/drivers/video/
H A Ddw_hdmi.c382 if (!hdmi->mpll_cfg || !hdmi->phy_cfg) in hdmi_phy_configure()
402 for (i = 0; hdmi->mpll_cfg[i].mpixelclock != (~0ul); i++) in hdmi_phy_configure()
403 if (mpixelclock <= hdmi->mpll_cfg[i].mpixelclock) in hdmi_phy_configure()
406 hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].cpce, PHY_OPMODE_PLLCFG); in hdmi_phy_configure()
407 hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].gmp, PHY_PLLGMPCTRL); in hdmi_phy_configure()
408 hdmi_phy_i2c_write(hdmi, hdmi->mpll_cfg[i].curr, PHY_PLLCURRCTRL); in hdmi_phy_configure()
/openbmc/linux/drivers/gpu/drm/imx/ipuv3/
H A Ddw_hdmi-imx.c167 .mpll_cfg = imx_mpll_cfg,
174 .mpll_cfg = imx_mpll_cfg,
/openbmc/linux/drivers/gpu/drm/ingenic/
H A Dingenic-dw-hdmi.c61 .mpll_cfg = ingenic_mpll_cfg,
/openbmc/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_hdmi_phy.c584 plat_data->mpll_cfg = variant->mpll_cfg; in sun8i_hdmi_phy_set_ops()
624 .mpll_cfg = sun50i_h6_mpll_cfg,
H A Dsun8i_dw_hdmi.h154 const struct dw_hdmi_mpll_config *mpll_cfg; member
/openbmc/u-boot/drivers/video/rockchip/
H A Drk_hdmi.c87 hdmi->mpll_cfg = rockchip_mpll_cfg; in rk_hdmi_ofdata_to_platdata()
/openbmc/linux/include/drm/bridge/
H A Ddw_hdmi.h158 const struct dw_hdmi_mpll_config *mpll_cfg; member
/openbmc/u-boot/include/
H A Ddw_hdmi.h539 const struct hdmi_mpll_config *mpll_cfg; member
/openbmc/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1576 const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg; in hdmi_phy_configure_dwc_hdmi_3d_tx()