| /openbmc/linux/arch/mips/mm/ |
| H A D | context.c | 66 u64 mmid; in flush_context() local
76 mmid = xchg_relaxed(&cpu_data[cpu].asid_cache, 0); in flush_context()
85 if (mmid == 0) in flush_context()
86 mmid = per_cpu(reserved_mmids, cpu); in flush_context()
88 __set_bit(mmid & cpu_asid_mask(&cpu_data[cpu]), mmid_map); in flush_context()
89 per_cpu(reserved_mmids, cpu) = mmid; in flush_context()
99 static bool check_update_reserved_mmid(u64 mmid, u64 newmmid) in check_update_reserved_mmid() argument
115 if (per_cpu(reserved_mmids, cpu) == mmid) { in check_update_reserved_mmid()
127 u64 mmid, version, mmid_mask; in get_new_mmid() local
129 mmid = cpu_context(0, mm); in get_new_mmid()
[all …]
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| /openbmc/linux/arch/mips/lib/ |
| H A D | dump_tlb.c | 68 unsigned long s_entryhi, entryhi, asid, mmid; in dump_tlb() local
108 mmid = read_c0_memorymapid(); in dump_tlb()
110 mmid = entryhi & asidmask; in dump_tlb()
131 if (!((entrylo0 | entrylo1) & ENTRYLO_G) && (mmid != asid)) in dump_tlb()
144 asidwidth, mmid); in dump_tlb()
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| /openbmc/linux/drivers/infiniband/hw/cxgb4/ |
| H A D | mem.c | 379 u32 mmid; in finish_mem_reg() local
383 mmid = stag >> 8; in finish_mem_reg()
387 pr_debug("mmid 0x%x mhp %p\n", mmid, mhp); in finish_mem_reg()
388 return xa_insert_irq(&mhp->rhp->mrs, mmid, mhp, GFP_KERNEL); in finish_mem_reg()
604 u32 mmid; in c4iw_alloc_mr() local
652 mmid = (stag) >> 8; in c4iw_alloc_mr()
654 if (xa_insert_irq(&rhp->mrs, mmid, mhp, GFP_KERNEL)) { in c4iw_alloc_mr()
659 pr_debug("mmid 0x%x mhp %p stag 0x%x\n", mmid, mhp, stag); in c4iw_alloc_mr()
704 u32 mmid; in c4iw_dereg_mr() local
710 mmid = mhp->attr.stag >> 8; in c4iw_dereg_mr()
[all …]
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| /openbmc/linux/arch/mips/include/asm/ |
| H A D | mmu_context.h | 109 return atomic64_read(&mm->context.mmid); in cpu_context()
118 atomic64_set(&mm->context.mmid, ctx); in set_cpu_context()
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| H A D | mmu.h | 12 atomic64_t mmid; member
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| /openbmc/linux/arch/arm/mm/ |
| H A D | tlb-v7.S | 36 mmid r3, r3 @ get vm_mm->context.id
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| H A D | tlb-v6.S | 38 mmid r3, r3 @ get vm_mm->context.id
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| H A D | proc-v7-3level.S | 47 mmid r2, r2
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| H A D | proc-v7-2level.S | 45 mmid r1, r1 @ get mm->context.id
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| H A D | proc-v6.S | 101 mmid r1, r1 @ get mm->context.id
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| H A D | proc-macros.S | 45 .macro mmid, rd, rn macro
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| /openbmc/qemu/target/mips/sysemu/ |
| H A D | machine.c | 171 uint32_t mmid = v->MMID; in put_tlb() local
188 qemu_put_be32s(f, &mmid); in put_tlb()
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| /openbmc/qemu/target/xtensa/core-lx106/ |
| H A D | gdb-config.c.inc | 45 XTREG( 22, 88,32, 4, 4,0x0259,0x000d,-2, 2,0x1000,mmid, 0,0,0,0,0,0)
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| H A D | xtensa-modules.c.inc | 6373 { "wsr.mmid", ICLASS_xt_iclass_wsr_mmid,
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| /openbmc/qemu/target/xtensa/core-sample_controller/ |
| H A D | gdb-config.c.inc | 65 XTREG( 41,164,32, 4, 4,0x0259,0x000d,-2, 2,0x1000,mmid, 0,0,0,0,0,0)
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| H A D | xtensa-modules.c.inc | 9411 { "wsr.mmid", ICLASS_xt_iclass_wsr_mmid,
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| /openbmc/qemu/target/xtensa/core-dc232b/ |
| H A D | gdb-config.c.inc | 128 XTREG(53, 212, 32, 4, 4, 0x0259, 0x000d, -2, 2, 0x1000, mmid,
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| H A D | xtensa-modules.c.inc | 11819 { "wsr.mmid", 253 /* xt_iclass_wsr.mmid */,
12687 return 355; /* wsr.mmid */
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| /openbmc/qemu/target/xtensa/core-dc233c/ |
| H A D | gdb-config.c.inc | 78 XTREG(53, 212, 32, 4, 4, 0x0259, 0x000d, -2, 2, 0x1000, mmid, 0, 0, 0, 0, 0, 0)
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| H A D | xtensa-modules.c.inc | 12467 { "wsr.mmid", ICLASS_xt_iclass_wsr_mmid,
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| /openbmc/qemu/target/xtensa/core-de212/ |
| H A D | gdb-config.c.inc | 74 XTREG( 50,200,32, 4, 4,0x0259,0x000d,-2, 2,0x1000,mmid, 0,0,0,0,0,0)
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| H A D | xtensa-modules.c.inc | 11842 { "wsr.mmid", ICLASS_xt_iclass_wsr_mmid,
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| /openbmc/qemu/target/xtensa/core-test_kc705_be/ |
| H A D | gdb-config.c.inc | 107 XTREG( 72,336,32, 4, 4,0x0259,0x000d,-2, 2,0x1000,mmid, 0,0,0,0,0,0)
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| /openbmc/qemu/target/xtensa/core-de233_fpu/ |
| H A D | gdb-config.c.inc | 110 XTREG( 71,348,32, 4, 4,0x0259,0x000d,-2, 2,0x1000,mmid, 0,0,0,0,0,0)
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| /openbmc/qemu/target/xtensa/core-dsp3400/ |
| H A D | gdb-config.c.inc | 251 XTREG(172,1808,32, 4, 4,0x0259,0x000d,-2, 2,0x1000,mmid, 0,0,0,0,0,0)
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