Searched refs:mmUVD_REG_XX_MASK (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_vcn.h | 75 #define mmUVD_REG_XX_MASK 0x026c macro
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| H A D | vcn_v2_0.c | 865 UVD, 0, mmUVD_REG_XX_MASK), 0x10, 0, indirect); in vcn_v2_0_start_dpg_mode()
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| H A D | vcn_v1_0.c | 1032 WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_REG_XX_MASK, 0x10, 0xFFFFFFFF, 0); in vcn_v1_0_start_dpg_mode()
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| H A D | vcn_v2_5.c | 890 VCN, 0, mmUVD_REG_XX_MASK), 0x10, 0, indirect); in vcn_v2_5_start_dpg_mode()
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| H A D | vcn_v3_0.c | 1013 VCN, inst_idx, mmUVD_REG_XX_MASK), 0x10, 0, indirect); in vcn_v3_0_start_dpg_mode()
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