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Searched refs:mmTC_CFG_L1_LOAD_POLICY0_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1725 #define mmTC_CFG_L1_LOAD_POLICY0_BASE_IDX … macro
H A Dgc_9_1_offset.h2012 #define mmTC_CFG_L1_LOAD_POLICY0_BASE_IDX … macro
H A Dgc_9_2_1_offset.h1952 #define mmTC_CFG_L1_LOAD_POLICY0_BASE_IDX … macro