Searched refs:mmSQ_LB_CTR_SEL1_BASE_IDX (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ | ||
H A D | gc_10_1_0_offset.h | 2552 #define mmSQ_LB_CTR_SEL1_BASE_IDX … macro |
H A D | gc_10_3_0_offset.h | 2643 #define mmSQ_LB_CTR_SEL1_BASE_IDX … macro |