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Searched refs:mmSQ_CMD (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v7.c505 WREG32(mmSQ_CMD, sq_cmd); in kgd_wave_control_execute()
H A Damdgpu_amdkfd_gfx_v8.c551 WREG32(mmSQ_CMD, sq_cmd); in kgd_wave_control_execute()
H A Damdgpu_amdkfd_gfx_v10_3.c598 WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CMD), sq_cmd); in wave_control_execute_v10_3()
H A Damdgpu_amdkfd_gfx_v10.c686 WREG32_SOC15(GC, 0, mmSQ_CMD, sq_cmd); in kgd_wave_control_execute()
H A Damdgpu_amdkfd_gfx_v9.c638 WREG32_SOC15(GC, GET_INST(GC, inst), mmSQ_CMD, sq_cmd); in kgd_gfx_v9_wave_control_execute()
H A Dgfx_v7_0.c4084 WREG32(mmSQ_CMD, value); in gfx_v7_0_ring_soft_recovery()
H A Dgfx_v8_0.c6407 WREG32(mmSQ_CMD, value); in gfx_v8_0_ring_soft_recovery()
H A Dgfx_v9_0.c5713 WREG32_SOC15(GC, 0, mmSQ_CMD, value); in gfx_v9_0_ring_soft_recovery()
H A Dgfx_v10_0.c8752 WREG32_SOC15(GC, 0, mmSQ_CMD, value); in gfx_v10_0_ring_soft_recovery()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1922 #define mmSQ_CMD 0x237b macro
H A Dgfx_7_0_d.h1901 #define mmSQ_CMD 0x237b macro
H A Dgfx_8_1_d.h2088 #define mmSQ_CMD 0x237b macro
H A Dgfx_8_0_d.h2120 #define mmSQ_CMD 0x237b macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h463 #define mmSQ_CMD … macro
H A Dgc_9_1_offset.h457 #define mmSQ_CMD … macro
H A Dgc_9_2_1_offset.h447 #define mmSQ_CMD … macro
H A Dgc_10_1_0_offset.h2533 #define mmSQ_CMD … macro
H A Dgc_10_3_0_offset.h2624 #define mmSQ_CMD … macro