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Searched refs:mmSPI_GDBG_WAVE_CNTL (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v10.c738 uint32_t data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); in kgd_gfx_v10_set_wave_launch_stall()
744 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data); in kgd_gfx_v10_set_wave_launch_stall()
750 RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); in kgd_gfx_v10_set_wave_launch_stall()
837 wave_cntl_prev = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); in kgd_gfx_v10_set_wave_launch_trap_override()
852 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), wave_cntl_prev); in kgd_gfx_v10_set_wave_launch_trap_override()
H A Damdgpu_amdkfd_gfx_v9.c678 uint32_t data = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); in kgd_gfx_v9_set_wave_launch_stall()
687 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data); in kgd_gfx_v9_set_wave_launch_stall()
693 RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); in kgd_gfx_v9_set_wave_launch_stall()
773 wave_cntl_prev = RREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL)); in kgd_gfx_v9_set_wave_launch_trap_override()
788 WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), wave_cntl_prev); in kgd_gfx_v9_set_wave_launch_trap_override()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1437 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
H A Dgfx_7_0_d.h1420 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
H A Dgfx_8_1_d.h1584 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
H A Dgfx_8_0_d.h1616 #define mmSPI_GDBG_WAVE_CNTL 0x31d1 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2715 #define mmSPI_GDBG_WAVE_CNTL … macro
H A Dgc_9_2_1_offset.h2901 #define mmSPI_GDBG_WAVE_CNTL … macro
H A Dgc_10_1_0_offset.h5197 #define mmSPI_GDBG_WAVE_CNTL … macro
H A Dgc_10_3_0_offset.h4856 #define mmSPI_GDBG_WAVE_CNTL … macro