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Searched refs:mmSDMA0_UTCL1_WATERMK (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h134 #define mmSDMA0_UTCL1_WATERMK … macro
H A Dsdma0_4_0_offset.h136 #define mmSDMA0_UTCL1_WATERMK 0x003d macro
H A Dsdma0_4_2_offset.h136 #define mmSDMA0_UTCL1_WATERMK … macro
H A Dsdma0_4_2_2_offset.h136 #define mmSDMA0_UTCL1_WATERMK … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v4_0.c102 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000),
148 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000)
292 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x03fbe1fe)
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h111 #define mmSDMA0_UTCL1_WATERMK … macro
H A Dgc_10_3_0_offset.h110 #define mmSDMA0_UTCL1_WATERMK … macro