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Searched refs:mmRLC_PG_DELAY (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1298 #define mmRLC_PG_DELAY 0x310d macro
H A Dgfx_7_0_d.h1285 #define mmRLC_PG_DELAY 0x310d macro
H A Dgfx_8_1_d.h1398 #define mmRLC_PG_DELAY 0xec4d macro
H A Dgfx_8_0_d.h1398 #define mmRLC_PG_DELAY 0xec4d macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6053 #define mmRLC_PG_DELAY … macro
H A Dgc_9_1_offset.h6275 #define mmRLC_PG_DELAY … macro
H A Dgc_9_2_1_offset.h6251 #define mmRLC_PG_DELAY … macro
H A Dgc_10_1_0_offset.h9391 #define mmRLC_PG_DELAY … macro
H A Dgc_10_3_0_offset.h9223 #define mmRLC_PG_DELAY … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c3861 WREG32(mmRLC_PG_DELAY, data); in gfx_v7_0_init_gfx_cgpg()
H A Dgfx_v8_0.c4006 WREG32(mmRLC_PG_DELAY, data); in gfx_v8_0_init_power_gating()
H A Dgfx_v9_0.c2689 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY), data); in gfx_v9_0_init_gfx_power_gating()