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Searched refs:mmRLC_CSIB_ADDR_HI (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h1478 #define mmRLC_CSIB_ADDR_HI 0xeca3 macro
H A Dgfx_8_0_d.h1482 #define mmRLC_CSIB_ADDR_HI 0xeca3 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6197 #define mmRLC_CSIB_ADDR_HI macro
H A Dgc_9_1_offset.h6419 #define mmRLC_CSIB_ADDR_HI macro
H A Dgc_9_2_1_offset.h6395 #define mmRLC_CSIB_ADDR_HI macro
H A Dgc_10_1_0_offset.h9521 #define mmRLC_CSIB_ADDR_HI macro
H A Dgc_10_3_0_offset.h9365 #define mmRLC_CSIB_ADDR_HI macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c5036 WREG32_SOC15_RLC(GC, 0, mmRLC_CSIB_ADDR_HI, in gfx_v10_0_init_csb()
5042 WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_HI, in gfx_v10_0_init_csb()
H A Dgfx_v8_0.c3870 WREG32(mmRLC_CSIB_ADDR_HI, in gfx_v8_0_init_csb()
H A Dgfx_v9_0.c2491 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_HI), in gfx_v9_0_init_csb()