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Searched refs:mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_d.h903 #define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL 0x5ed8 macro
H A Dgmc_8_1_d.h1701 #define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL 0x5ed8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h1130 #define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL macro
H A Ddcn_1_0_offset.h1544 #define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL macro
H A Ddcn_2_0_0_offset.h1168 #define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h380 #define mmMCIF_WB1_MCIF_WB_BUFMGR_VCE_CONTROL macro