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Searched refs:mmGDS_OA_VMID0 (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h2287 #define mmGDS_OA_VMID0 0x3330 macro
H A Dgfx_7_0_d.h2265 #define mmGDS_OA_VMID0 0x3330 macro
H A Dgfx_8_1_d.h2464 #define mmGDS_OA_VMID0 0x3330 macro
H A Dgfx_8_0_d.h2485 #define mmGDS_OA_VMID0 0x3330 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c2344 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v9_0_init_compute_vmid()
2362 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v9_0_init_gds_vmid()
4059 SOC15_REG_OFFSET(GC, 0, mmGDS_OA_VMID0) + vmid, in gfx_v9_0_ring_emit_gds_switch()
H A Dgfx_v10_0.c4860 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v10_0_init_compute_vmid()
4881 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()
7387 SOC15_REG_OFFSET(GC, 0, mmGDS_OA_VMID0) + vmid, in gfx_v10_0_ring_emit_gds_switch()
H A Dgfx_v7_0.c94 {mmGDS_VMID0_BASE, mmGDS_VMID0_SIZE, mmGDS_GWS_VMID0, mmGDS_OA_VMID0},
H A Dgfx_v8_0.c179 {mmGDS_VMID0_BASE, mmGDS_VMID0_SIZE, mmGDS_GWS_VMID0, mmGDS_OA_VMID0},
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3139 #define mmGDS_OA_VMID0 macro
H A Dgc_9_1_offset.h3369 #define mmGDS_OA_VMID0 macro
H A Dgc_9_2_1_offset.h3319 #define mmGDS_OA_VMID0 macro
H A Dgc_10_1_0_offset.h5637 #define mmGDS_OA_VMID0 macro
H A Dgc_10_3_0_offset.h5264 #define mmGDS_OA_VMID0 macro