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Searched refs:mmCP_ROQ1_THRESHOLDS (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h530 #define mmCP_ROQ1_THRESHOLDS 0x21D5 macro
H A Dgfx_7_2_d.h547 #define mmCP_ROQ1_THRESHOLDS 0x21d5 macro
H A Dgfx_7_0_d.h534 #define mmCP_ROQ1_THRESHOLDS 0x21d5 macro
H A Dgfx_8_1_d.h600 #define mmCP_ROQ1_THRESHOLDS 0x21d5 macro
H A Dgfx_8_0_d.h600 #define mmCP_ROQ1_THRESHOLDS 0x21d5 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h219 #define mmCP_ROQ1_THRESHOLDS … macro
H A Dgc_9_1_offset.h219 #define mmCP_ROQ1_THRESHOLDS … macro
H A Dgc_9_2_1_offset.h213 #define mmCP_ROQ1_THRESHOLDS … macro
H A Dgc_10_1_0_offset.h2221 #define mmCP_ROQ1_THRESHOLDS … macro
H A Dgc_10_3_0_offset.h2304 #define mmCP_ROQ1_THRESHOLDS … macro