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Searched refs:mmCP_RB1_ACTIVE (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h5139 #define mmCP_RB1_ACTIVE … macro
H A Dgc_10_3_0_offset.h4802 #define mmCP_RB1_ACTIVE … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c6169 WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1); in gfx_v10_0_cp_gfx_resume()