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Searched refs:mmCP_ME_MC_WADDR_HI (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h451 #define mmCP_ME_MC_WADDR_HI 0x216A macro
H A Dgfx_7_2_d.h450 #define mmCP_ME_MC_WADDR_HI 0xc06a macro
H A Dgfx_7_0_d.h438 #define mmCP_ME_MC_WADDR_HI 0xc06a macro
H A Dgfx_8_1_d.h488 #define mmCP_ME_MC_WADDR_HI 0xc06a macro
H A Dgfx_8_0_d.h488 #define mmCP_ME_MC_WADDR_HI 0xc06a macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4715 #define mmCP_ME_MC_WADDR_HI … macro
H A Dgc_9_1_offset.h4945 #define mmCP_ME_MC_WADDR_HI … macro
H A Dgc_9_2_1_offset.h4901 #define mmCP_ME_MC_WADDR_HI … macro
H A Dgc_10_1_0_offset.h7207 #define mmCP_ME_MC_WADDR_HI … macro
H A Dgc_10_3_0_offset.h6834 #define mmCP_ME_MC_WADDR_HI … macro