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Searched refs:mmCP_MES_DC_OP_CNTL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v10_1.c485 data = RREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL); in mes_v10_1_enable()
488 WREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL, data); in mes_v10_1_enable()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h7759 #define mmCP_MES_DC_OP_CNTL … macro
H A Dgc_10_3_0_offset.h7394 #define mmCP_MES_DC_OP_CNTL … macro