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Searched refs:mmCP_HQD_VMID (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h1512 { 0x00010000, mmCP_HQD_VMID },
1522 { 0x00010000, mmCP_HQD_VMID },
1532 { 0x00010000, mmCP_HQD_VMID },
1542 { 0x00010000, mmCP_HQD_VMID },
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v10_1.c748 data = RREG32_SOC15(GC, 0, mmCP_HQD_VMID);
750 WREG32_SOC15(GC, 0, mmCP_HQD_VMID, data);
H A Damdgpu_amdkfd_gfx_v9.c975 *vmid = (RREG32_SOC15(GC, inst, mmCP_HQD_VMID) & in get_wave_count()
H A Dgfx_v7_0.c2987 for (mqd_reg = mmCP_HQD_VMID; mqd_reg <= mmCP_MQD_CONTROL; mqd_reg++) in gfx_v7_0_mqd_commit()
H A Dgfx_v8_0.c4571 for (mqd_reg = mmCP_HQD_VMID; mqd_reg <= mmCP_HQD_EOP_CONTROL; mqd_reg++) in gfx_v8_0_mqd_commit()
H A Dgfx_v9_0.c3479 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid); in gfx_v9_0_kiq_init_register()
H A Dgfx_v10_0.c6708 WREG32_SOC15(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid); in gfx_v10_0_kiq_init_register()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h583 #define mmCP_HQD_VMID 0x3248 macro
H A Dgfx_7_0_d.h570 #define mmCP_HQD_VMID 0x3248 macro
H A Dgfx_8_1_d.h633 #define mmCP_HQD_VMID 0x3248 macro
H A Dgfx_8_0_d.h633 #define mmCP_HQD_VMID 0x3248 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2825 #define mmCP_HQD_VMID … macro
H A Dgc_9_1_offset.h3053 #define mmCP_HQD_VMID … macro
H A Dgc_9_2_1_offset.h3009 #define mmCP_HQD_VMID … macro
H A Dgc_10_1_0_offset.h5307 #define mmCP_HQD_VMID … macro
H A Dgc_10_3_0_offset.h4942 #define mmCP_HQD_VMID … macro