Searched refs:mmCP_HQD_EOP_CONTROL (Results 1 – 11 of 11) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v8.c | 186 for (reg = mmCP_MQD_BASE_ADDR; reg <= mmCP_HQD_EOP_CONTROL; reg++) in kgd_hqd_load()
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| H A D | gfx_v8_0.c | 4434 tmp = RREG32(mmCP_HQD_EOP_CONTROL); in gfx_v8_0_mqd_init()
4571 for (mqd_reg = mmCP_HQD_VMID; mqd_reg <= mmCP_HQD_EOP_CONTROL; mqd_reg++) in gfx_v8_0_mqd_commit()
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| H A D | gfx_v9_0.c | 3279 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL); in gfx_v9_0_mqd_init()
3395 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_CONTROL, in gfx_v9_0_kiq_init_register()
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| H A D | gfx_v10_0.c | 6519 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL); in gfx_v10_0_compute_mqd_init()
6655 WREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL, in gfx_v10_0_kiq_init_register()
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_8_1_d.h | 672 #define mmCP_HQD_EOP_CONTROL 0x326c macro
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| H A D | gfx_8_0_d.h | 672 #define mmCP_HQD_EOP_CONTROL 0x326c macro
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2901 #define mmCP_HQD_EOP_CONTROL … macro
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| H A D | gc_9_1_offset.h | 3129 #define mmCP_HQD_EOP_CONTROL … macro
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| H A D | gc_9_2_1_offset.h | 3085 #define mmCP_HQD_EOP_CONTROL … macro
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| H A D | gc_10_1_0_offset.h | 5383 #define mmCP_HQD_EOP_CONTROL … macro
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| H A D | gc_10_3_0_offset.h | 5018 #define mmCP_HQD_EOP_CONTROL … macro
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