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Searched refs:mmCP_HQD_EOP_BASE_ADDR_HI (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_d.h671 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b macro
H A Dgfx_8_0_d.h671 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2899 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
H A Dgc_9_1_offset.h3127 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
H A Dgc_9_2_1_offset.h3083 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
H A Dgc_10_1_0_offset.h5381 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
H A Dgc_10_3_0_offset.h5016 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c3391 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI, in gfx_v9_0_kiq_init_register()
H A Dgfx_v10_0.c6651 WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI, in gfx_v10_0_kiq_init_register()