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Searched refs:mmCP_CE_UCODE_ADDR (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h386 #define mmCP_CE_UCODE_ADDR 0x305A macro
H A Dgfx_7_2_d.h250 #define mmCP_CE_UCODE_ADDR 0x305a macro
H A Dgfx_7_0_d.h248 #define mmCP_CE_UCODE_ADDR 0x305a macro
H A Dgfx_8_1_d.h280 #define mmCP_CE_UCODE_ADDR 0xf818 macro
H A Dgfx_8_0_d.h279 #define mmCP_CE_UCODE_ADDR 0xf818 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c1962 WREG32(mmCP_CE_UCODE_ADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
1965 WREG32(mmCP_CE_UCODE_ADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
1977 WREG32(mmCP_CE_UCODE_ADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
H A Dgfx_v7_0.c2424 WREG32(mmCP_CE_UCODE_ADDR, 0); in gfx_v7_0_cp_gfx_load_microcode()
2427 WREG32(mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version); in gfx_v7_0_cp_gfx_load_microcode()
H A Dgfx_v9_0.c3009 WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, 0); in gfx_v9_0_cp_gfx_load_microcode()
3012 WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version); in gfx_v9_0_cp_gfx_load_microcode()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6733 #define mmCP_CE_UCODE_ADDR macro
H A Dgc_9_1_offset.h6957 #define mmCP_CE_UCODE_ADDR macro
H A Dgc_9_2_1_offset.h6985 #define mmCP_CE_UCODE_ADDR macro
H A Dgc_10_1_0_offset.h10241 #define mmCP_CE_UCODE_ADDR macro
H A Dgc_10_3_0_offset.h9951 #define mmCP_CE_UCODE_ADDR macro