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Searched refs:mmCGTS_CU5_TD_TCP_CTRL_REG (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c201 mmCGTS_CU5_TD_TCP_CTRL_REG, 0xffffffff, 0x00090008,
H A Dgfx_v8_0.c291 mmCGTS_CU5_TD_TCP_CTRL_REG, 0xffffffff, 0x00090008,
565 mmCGTS_CU5_TD_TCP_CTRL_REG, 0xffffffff, 0x00090008,
661 mmCGTS_CU5_TD_TCP_CTRL_REG, 0xffffffff, 0x00090008,
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h1535 #define mmCGTS_CU5_TD_TCP_CTRL_REG 0xf025 macro
H A Dgfx_7_0_d.h1514 #define mmCGTS_CU5_TD_TCP_CTRL_REG 0xf025 macro
H A Dgfx_8_1_d.h1696 #define mmCGTS_CU5_TD_TCP_CTRL_REG 0xf025 macro
H A Dgfx_8_0_d.h1728 #define mmCGTS_CU5_TD_TCP_CTRL_REG 0xf025 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6371 #define mmCGTS_CU5_TD_TCP_CTRL_REG macro
H A Dgc_9_1_offset.h6593 #define mmCGTS_CU5_TD_TCP_CTRL_REG macro
H A Dgc_9_2_1_offset.h6605 #define mmCGTS_CU5_TD_TCP_CTRL_REG macro