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Searched refs:mmCC_GC_SHADER_ARRAY_CONFIG_GEN0_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h2334 #define mmCC_GC_SHADER_ARRAY_CONFIG_GEN0_BASE_IDX macro
H A Dgc_10_3_0_offset.h2427 #define mmCC_GC_SHADER_ARRAY_CONFIG_GEN0_BASE_IDX macro