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Searched refs:misc1 (Results 1 – 24 of 24) sorted by relevance

/openbmc/linux/drivers/comedi/drivers/
H A Dcb_das16_cs.c111 unsigned short misc1; member
153 devpriv->misc1 &= ~(DAS16CS_MISC1_INTE | DAS16CS_MISC1_INT_SRC_MASK | in das16cs_ai_insn_read()
156 devpriv->misc1 &= ~DAS16CS_MISC1_SEDIFF; in das16cs_ai_insn_read()
158 devpriv->misc1 |= DAS16CS_MISC1_SEDIFF; in das16cs_ai_insn_read()
159 outw(devpriv->misc1, dev->iobase + DAS16CS_MISC1_REG); in das16cs_ai_insn_read()
199 unsigned short misc1; in das16cs_ao_insn_write() local
206 outw(devpriv->misc1, dev->iobase + DAS16CS_MISC1_REG); in das16cs_ao_insn_write()
210 misc1 = devpriv->misc1 & ~DAS16CS_MISC1_DAC_MASK; in das16cs_ao_insn_write()
212 misc1 |= DAS16CS_MISC1_DAC0CS; in das16cs_ao_insn_write()
214 misc1 |= DAS16CS_MISC1_DAC1CS; in das16cs_ao_insn_write()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hpo_dp_stream_encoder.c202 uint8_t misc1 = 0; in dcn31_hpo_dp_stream_enc_set_stream_attribute() local
246 misc1 = misc1 | 0x80; // MISC1[7] = 1 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
252 misc1 = misc1 | 0x40; // MISC1[6] = 1 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
266 misc1 = misc1 | 0x40; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
268 misc1 = misc1 & ~0x40; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
300 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
304 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
309 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
318 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dcn31_hpo_dp_stream_enc_set_stream_attribute()
424 MSA_DATA_LANE_3, misc1); in dcn31_hpo_dp_stream_enc_set_stream_attribute()
/openbmc/linux/drivers/soc/tegra/
H A Dari-tegra186.c50 u64 addr, misc1, misc2; in tegra186_ari_panic_handler() local
55 MCA_ARI_RW_SUBIDX_MSC1, 0, &misc1); in tegra186_ari_panic_handler()
62 bank_names[i], status, addr, misc1, misc2); in tegra186_ari_panic_handler()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.c255 uint32_t misc1 = 0; in enc1_stream_encoder_dp_set_stream_attribute() local
307 misc1 = REG_READ(DP_MSA_MISC); in enc1_stream_encoder_dp_set_stream_attribute()
314 misc1 = misc1 | 0x40; in enc1_stream_encoder_dp_set_stream_attribute()
316 misc1 = misc1 & ~0x40; in enc1_stream_encoder_dp_set_stream_attribute()
370 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in enc1_stream_encoder_dp_set_stream_attribute()
374 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in enc1_stream_encoder_dp_set_stream_attribute()
379 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in enc1_stream_encoder_dp_set_stream_attribute()
388 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in enc1_stream_encoder_dp_set_stream_attribute()
414 REG_WRITE(DP_MSA_MISC, misc1); /* MSA_MISC1 */ in enc1_stream_encoder_dp_set_stream_attribute()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.c277 uint32_t misc1 = 0; in dce110_stream_encoder_dp_set_stream_attribute() local
334 misc1 = REG_READ(DP_MSA_MISC); in dce110_stream_encoder_dp_set_stream_attribute()
390 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dce110_stream_encoder_dp_set_stream_attribute()
395 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dce110_stream_encoder_dp_set_stream_attribute()
401 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dce110_stream_encoder_dp_set_stream_attribute()
412 misc1 = misc1 & ~0x80; /* bit7 = 0*/ in dce110_stream_encoder_dp_set_stream_attribute()
448 REG_WRITE(DP_MSA_MISC, misc1); /* MSA_MISC1 */ in dce110_stream_encoder_dp_set_stream_attribute()
/openbmc/linux/drivers/pcmcia/
H A Di82365.c136 u_char misc1, misc2; member
298 p->misc1 = i365_get(s, PD67_MISC_CTL_1); in cirrus_get_state()
299 p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA); in cirrus_get_state()
316 i365_set(s, PD67_MISC_CTL_1, misc | p->misc1); in cirrus_set_state()
337 if (p->misc1 & PD67_MC1_INPACK_ENA) in cirrus_set_opts()
/openbmc/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c272 u8 misc1; member
1090 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_MISC1, dp->config.misc1); in zynqmp_dp_update_misc()
1113 config->misc1 &= ~ZYNQMP_DP_MAIN_STREAM_MISC1_Y_ONLY_EN; in zynqmp_dp_set_format()
1132 config->misc1 |= ZYNQMP_DP_MAIN_STREAM_MISC1_Y_ONLY_EN; in zynqmp_dp_set_format()
/openbmc/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c1773 misc0 = 0, misc1 = 0, pxl_repr, in cdns_mhdp_configure_video() local
1898 misc1 = DP_TEST_INTERLACED; in cdns_mhdp_configure_video()
1900 misc1 |= CDNS_DP_TEST_COLOR_FORMAT_RAW_Y_ONLY; in cdns_mhdp_configure_video()
1903 misc1 = CDNS_DP_TEST_VSC_SDP; in cdns_mhdp_configure_video()
1906 misc0 | (misc1 << 8)); in cdns_mhdp_configure_video()
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dgdb-config.c.inc112 XTREG( 88,352,32, 4, 4,0x02f5,0x0007,-2, 2,0x1000,misc1, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc9234 { "rsr.misc1", ICLASS_xt_iclass_rsr_misc1,
9237 { "wsr.misc1", ICLASS_xt_iclass_wsr_misc1,
9240 { "xsr.misc1", ICLASS_xt_iclass_xsr_misc1,
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dgdb-config.c.inc228 XTREG(103, 412, 32, 4, 4, 0x02f5, 0x0007, -2, 2, 0x1000, misc1,
H A Dxtensa-modules.c.inc11393 { "rsr.misc1", 171 /* xt_iclass_rsr.misc1 */,
11396 { "wsr.misc1", 172 /* xt_iclass_wsr.misc1 */,
11399 { "xsr.misc1", 173 /* xt_iclass_xsr.misc1 */,
12450 return 215; /* xsr.misc1 */
12650 return 213; /* rsr.misc1 */
12785 return 214; /* wsr.misc1 */
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dgdb-config.c.inc129 XTREG(104, 416, 32, 4, 4, 0x02f5, 0x0007, -2, 2, 0x1000, misc1, 0, 0, 0, 0, 0, 0)
H A Dxtensa-modules.c.inc12038 { "rsr.misc1", ICLASS_xt_iclass_rsr_misc1,
12041 { "wsr.misc1", ICLASS_xt_iclass_wsr_misc1,
12044 { "xsr.misc1", ICLASS_xt_iclass_xsr_misc1,
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dimx-regs.h326 u32 misc1; member
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dgdb-config.c.inc125 XTREG( 90,408,32, 4, 4,0x02f5,0x0007,-2, 2,0x1000,misc1, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc27275 { "rsr.misc1", ICLASS_xt_iclass_rsr_misc1,
27278 { "wsr.misc1", ICLASS_xt_iclass_wsr_misc1,
27281 { "xsr.misc1", ICLASS_xt_iclass_xsr_misc1,
/openbmc/qemu/target/xtensa/core-de212/
H A Dgdb-config.c.inc121 XTREG( 97,388,32, 4, 4,0x02f5,0x0007,-2, 2,0x1000,misc1, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc11407 { "rsr.misc1", ICLASS_xt_iclass_rsr_misc1,
11410 { "wsr.misc1", ICLASS_xt_iclass_wsr_misc1,
11413 { "xsr.misc1", ICLASS_xt_iclass_xsr_misc1,
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dgdb-config.c.inc158 XTREG(123,540,32, 4, 4,0x02f5,0x0007,-2, 2,0x1000,misc1, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc33551 { "rsr.misc1", ICLASS_xt_iclass_rsr_misc1,
33554 { "wsr.misc1", ICLASS_xt_iclass_wsr_misc1,
33557 { "xsr.misc1", ICLASS_xt_iclass_xsr_misc1,
/openbmc/qemu/target/xtensa/core-fsf/
H A Dxtensa-modules.c.inc8266 { "rsr.misc1", 142 /* xt_iclass_rsr.misc1 */,
8269 { "wsr.misc1", 143 /* xt_iclass_wsr.misc1 */,
8272 { "xsr.misc1", 144 /* xt_iclass_xsr.misc1 */,
8909 return 186; /* xsr.misc1 */
9056 return 184; /* rsr.misc1 */
9153 return 185; /* wsr.misc1 */
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dgdb-config.c.inc162 XTREG(123,556,32, 4, 4,0x02f5,0x0007,-2, 2,0x1000,misc1, 0,0,0,0,0,0)
H A Dxtensa-modules.c.inc16660 { "rsr.misc1", ICLASS_xt_iclass_rsr_misc1,
16663 { "wsr.misc1", ICLASS_xt_iclass_wsr_misc1,
16666 { "xsr.misc1", ICLASS_xt_iclass_xsr_misc1,