| /openbmc/linux/drivers/net/mdio/ |
| H A D | mdio-mscc-miim.c | 75 struct mscc_miim_dev *miim = bus->priv; in mscc_miim_status() local
78 ret = regmap_read(miim->regs, in mscc_miim_status()
79 MSCC_MIIM_REG_STATUS + miim->mii_status_offset, &val); in mscc_miim_status()
108 struct mscc_miim_dev *miim = bus->priv; in mscc_miim_read() local
116 ret = regmap_write(miim->regs, in mscc_miim_read()
117 MSCC_MIIM_REG_CMD + miim->mii_status_offset, in mscc_miim_read()
132 ret = regmap_read(miim->regs, in mscc_miim_read()
133 MSCC_MIIM_REG_DATA + miim->mii_status_offset, &val); in mscc_miim_read()
139 if (!miim->ignore_read_errors && !!(val & MSCC_MIIM_DATA_ERROR)) { in mscc_miim_read()
152 struct mscc_miim_dev *miim = bus->priv; in mscc_miim_write() local
[all …]
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| H A D | Makefile | 19 obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o
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| /openbmc/u-boot/drivers/net/mscc_eswitch/ |
| H A D | mscc_miim.c | 24 static int mscc_miim_wait_ready(struct mscc_miim_dev *miim) in mscc_miim_wait_ready() argument
26 return wait_for_bit_le32(miim->regs + MIIM_STATUS, MIIM_STAT_BUSY, in mscc_miim_wait_ready()
32 struct mscc_miim_dev *miim = (struct mscc_miim_dev *)bus->priv; in mscc_miim_read() local
36 ret = mscc_miim_wait_ready(miim); in mscc_miim_read()
42 miim->regs + MIIM_CMD); in mscc_miim_read()
44 ret = mscc_miim_wait_ready(miim); in mscc_miim_read()
48 val = readl(miim->regs + MIIM_DATA); in mscc_miim_read()
62 struct mscc_miim_dev *miim = (struct mscc_miim_dev *)bus->priv; in mscc_miim_write() local
65 ret = mscc_miim_wait_ready(miim); in mscc_miim_write()
71 MIIM_CMD_OPR_WRITE, miim->regs + MIIM_CMD); in mscc_miim_write()
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| H A D | ocelot_switch.c | 143 static struct mscc_miim_dev miim[NUM_PHY]; variable
147 struct mscc_miim_dev *miim = (struct mscc_miim_dev *)bus->priv; in mscc_miim_reset() local
149 if (miim->phy_regs) { in mscc_miim_reset()
150 writel(0, miim->phy_regs + PHY_CFG); in mscc_miim_reset()
152 | PHY_CFG_ENA, miim->phy_regs + PHY_CFG); in mscc_miim_reset()
194 miim[INTERNAL].phy_regs = ioremap(phy_base[PHY], phy_size[PHY]); in ocelot_mdiobus_init()
195 miim[INTERNAL].regs = ioremap(phy_base[MIIM], phy_size[MIIM]); in ocelot_mdiobus_init()
196 bus->priv = &miim[INTERNAL]; in ocelot_mdiobus_init()
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| H A D | luton_switch.c | 210 static struct mscc_miim_dev miim[NUM_PHY]; variable
247 miim[mdiobus_id].regs = ioremap(phy_base[mdiobus_id], in luton_mdiobus_init()
249 bus->priv = &miim[mdiobus_id]; in luton_mdiobus_init()
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| /openbmc/u-boot/drivers/net/ |
| H A D | pch_gbe.c | 341 if (readl(&mac_regs->miim) & PCH_GBE_MIIM_OPER_READY) in pch_gbe_mdio_ready()
353 u32 miim; in pch_gbe_mdio_read() local
358 miim = (addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) | in pch_gbe_mdio_read()
361 writel(miim, &mac_regs->miim); in pch_gbe_mdio_read()
366 return readl(&mac_regs->miim) & 0xffff; in pch_gbe_mdio_read()
373 u32 miim; in pch_gbe_mdio_write() local
378 miim = (addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) | in pch_gbe_mdio_write()
381 writel(miim, &mac_regs->miim); in pch_gbe_mdio_write()
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| H A D | pch_gbe.h | 258 u32 miim; member
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| /openbmc/linux/arch/arm64/boot/dts/microchip/ |
| H A D | sparx5.dtsi | 286 function = "miim";
291 function = "miim";
296 function = "miim";
426 compatible = "mscc,ocelot-miim";
434 compatible = "mscc,ocelot-miim";
444 compatible = "mscc,ocelot-miim";
454 compatible = "mscc,ocelot-miim";
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| /openbmc/linux/arch/mips/boot/dts/mscc/ |
| H A D | ocelot.dtsi | 231 function = "miim";
239 compatible = "mscc,ocelot-miim";
261 compatible = "mscc,ocelot-miim";
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| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 61 miim_c_pins: miim-c-pins {
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| H A D | lan966x.dtsi | 530 compatible = "microchip,lan966x-miim";
539 compatible = "microchip,lan966x-miim";
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| /openbmc/qemu/hw/net/ |
| H A D | meson.build | 58 'fsl_etsec/miim.c',
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| /openbmc/u-boot/arch/mips/dts/ |
| H A D | mscc,luton.dtsi | 219 compatible = "mscc,luton-miim";
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| H A D | mscc,ocelot.dtsi | 188 compatible = "mscc,ocelot-miim";
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| /openbmc/linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3566-radxa-cm3-io.dts | 147 gmac1m0_miim: gmac1m0-miim {
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| H A D | rk3588-pinctrl.dtsi | 62 gmac0_miim: gmac0-miim {
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| H A D | rk3568-pinctrl.dtsi | 569 gmac0_miim: gmac0-miim {
638 gmac1m0_miim: gmac1m0-miim {
705 gmac1m1_miim: gmac1m1-miim {
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| H A D | rk3588s-pinctrl.dtsi | 437 gmac1_miim: gmac1-miim {
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| /openbmc/ |
| D | opengrok1.0.log | [all...] |
| D | opengrok2.0.log | [all...] |
| /openbmc/linux/ |
| H A D | opengrok0.0.log | [all...] |
| H A D | opengrok2.0.log | [all...] |
| H A D | opengrok1.0.log | [all...] |