/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | rvu_npc_hash.c | 448 hash &= table->mem_table.hash_mask; in rvu_exact_calculate_hash() 449 hash += table->mem_table.hash_offset; in rvu_exact_calculate_hash() 472 depth = table->mem_table.depth; in rvu_npc_exact_alloc_mem_table_entry() 476 for (i = 0; i < table->mem_table.ways; i++) { in rvu_npc_exact_alloc_mem_table_entry() 477 if (test_bit(hash + i * depth, table->mem_table.bmap)) in rvu_npc_exact_alloc_mem_table_entry() 480 set_bit(hash + i * depth, table->mem_table.bmap); in rvu_npc_exact_alloc_mem_table_entry() 493 bitmap_weight(table->mem_table.bmap, table->mem_table.depth)); in rvu_npc_exact_alloc_mem_table_entry() 677 rvu->hw->table->mem_table.hash_mask = (depth - 1); in rvu_exact_config_result_ctrl() 681 rvu->hw->table->mem_table.hash_offset = 0; in rvu_exact_config_result_ctrl() 710 rvu->hw->table->mem_table.mask = mask; in rvu_exact_config_table_mask() [all …]
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H A D | rvu_npc_hash.h | 184 } mem_table; member
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H A D | rvu_debugfs.c | 3000 for (i = 0; i < table->mem_table.ways; i++) { in rvu_dbg_npc_exact_show_entries() 3008 for (i = 0; i < table->mem_table.ways; i++) in rvu_dbg_npc_exact_show_entries() 3014 for (i = 0; i < table->mem_table.depth; i++) { in rvu_dbg_npc_exact_show_entries() 3016 for (j = 0; j < table->mem_table.ways; j++) { in rvu_dbg_npc_exact_show_entries() 3031 for (j = 0; j < table->mem_table.ways; j++) { in rvu_dbg_npc_exact_show_entries() 3088 seq_printf(s, "Ways : %d\n", table->mem_table.ways); in rvu_dbg_npc_exact_show_info() 3089 seq_printf(s, "Depth : %d\n", table->mem_table.depth); in rvu_dbg_npc_exact_show_info() 3090 seq_printf(s, "Mask : 0x%llx\n", table->mem_table.mask); in rvu_dbg_npc_exact_show_info() 3091 seq_printf(s, "Hash Mask : 0x%x\n", table->mem_table.hash_mask); in rvu_dbg_npc_exact_show_info() 3092 seq_printf(s, "Hash Offset : 0x%x\n", table->mem_table.hash_offset); in rvu_dbg_npc_exact_show_info()
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/openbmc/linux/arch/parisc/kernel/ |
H A D | inventory.c | 306 struct pdc_pat_pd_addr_map_entry mem_table[PAT_MAX_RANGES+1]; in pat_memconfig() local 316 status = pdc_pat_pd_get_addr_map(&actual_len, mem_table, length, 0L); in pat_memconfig() 345 mtbl_ptr = mem_table; in pat_memconfig() 400 struct pdc_memory_table mem_table[MAX_PHYSMEM_RANGES]; in sprockets_memconfig() local 407 status = pdc_mem_mem_table(&r_addr,mem_table, in sprockets_memconfig() 430 mtbl_ptr = mem_table; in sprockets_memconfig()
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | vega20_hwmgr.c | 621 dpm_table = &(data->dpm_table.mem_table); in vega20_setup_memclk_dpm_table() 673 dpm_table = &(data->dpm_table.mem_table); in vega20_setup_default_dpm_tables() 1078 data->dpm_table.mem_table.dpm_levels[data->dpm_table.mem_table.count - 2].value; in vega20_od8_set_feature_capabilities() 1527 &(data->dpm_table.mem_table); in vega20_get_mclk_od() 1529 &(data->golden_dpm_table.mem_table); in vega20_get_mclk_od() 1546 &(data->golden_dpm_table.mem_table); in vega20_set_mclk_od() 1572 struct vega20_single_dpm_table *mem_table = &(data->dpm_table.mem_table); in vega20_populate_umdpstate_clocks() local 1575 mem_table->count > VEGA20_UMD_PSTATE_MCLK_LEVEL) { in vega20_populate_umdpstate_clocks() 1577 hwmgr->pstate_mclk = mem_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value; in vega20_populate_umdpstate_clocks() 1580 hwmgr->pstate_mclk = mem_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks() [all …]
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H A D | vega12_hwmgr.c | 680 dpm_table = &(data->dpm_table.mem_table); in vega12_setup_default_dpm_tables() 1042 struct vega12_single_dpm_table *mem_dpm_table = &(data->dpm_table.mem_table); in vega12_populate_umdpstate_clocks() 1176 min_freq = data->dpm_table.mem_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level() 1184 min_freq = data->dpm_table.mem_table.dpm_state.hard_min_level; in vega12_upload_dpm_min_level() 1268 max_freq = data->dpm_table.mem_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level() 1667 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.mem_table)); in vega12_force_dpm_highest() 1669 data->dpm_table.mem_table.dpm_state.soft_min_level = in vega12_force_dpm_highest() 1670 data->dpm_table.mem_table.dpm_state.soft_max_level = in vega12_force_dpm_highest() 1671 data->dpm_table.mem_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest() 1696 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.mem_table)); in vega12_force_dpm_lowest() [all …]
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H A D | vega10_hwmgr.c | 1371 data->dpm_table.mem_table.count = 0; in vega10_setup_default_dpm_tables() 1372 dpm_table = &(data->dpm_table.mem_table); in vega10_setup_default_dpm_tables() 1883 &(data->dpm_table.mem_table); in vega10_populate_all_memory_levels() 3440 struct vega10_single_dpm_table *mclk_table = &(data->dpm_table.mem_table); in vega10_find_dpm_states_clocks_in_dpm_table() 3501 for (count = 0; count < dpm_table->mem_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels() 3502 dpm_table->mem_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels() 3585 &(data->dpm_table.mem_table), in vega10_trim_dpm_states() 3662 data->dpm_table.mem_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level() 3676 data->dpm_table.mem_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level() 3719 data->dpm_table.mem_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level() [all …]
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H A D | vega12_hwmgr.h | 127 struct vega12_single_dpm_table mem_table; member
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H A D | vega10_hwmgr.h | 149 struct vega10_single_dpm_table mem_table; member
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H A D | vega20_hwmgr.h | 180 struct vega20_single_dpm_table mem_table; member
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
H A D | aldebaran_ppt.h | 62 struct aldebaran_single_dpm_table mem_table; member
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H A D | aldebaran_ppt.c | 513 struct smu_13_0_dpm_table *mem_table = in aldebaran_populate_umd_state_clk() local 525 pstate_table->uclk_pstate.min = mem_table->min; in aldebaran_populate_umd_state_clk() 526 pstate_table->uclk_pstate.peak = mem_table->max; in aldebaran_populate_umd_state_clk() 527 pstate_table->uclk_pstate.curr.min = mem_table->min; in aldebaran_populate_umd_state_clk() 528 pstate_table->uclk_pstate.curr.max = mem_table->max; in aldebaran_populate_umd_state_clk() 536 mem_table->count > ALDEBARAN_UMD_PSTATE_MCLK_LEVEL && in aldebaran_populate_umd_state_clk() 541 mem_table->dpm_levels[ALDEBARAN_UMD_PSTATE_MCLK_LEVEL].value; in aldebaran_populate_umd_state_clk()
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H A D | smu_v13_0_6_ppt.c | 595 struct smu_13_0_dpm_table *mem_table = in smu_v13_0_6_populate_umd_state_clk() local 606 pstate_table->uclk_pstate.min = mem_table->min; in smu_v13_0_6_populate_umd_state_clk() 607 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v13_0_6_populate_umd_state_clk() 608 pstate_table->uclk_pstate.curr.min = mem_table->min; in smu_v13_0_6_populate_umd_state_clk() 609 pstate_table->uclk_pstate.curr.max = mem_table->max; in smu_v13_0_6_populate_umd_state_clk() 617 mem_table->count > SMU_13_0_6_UMD_PSTATE_MCLK_LEVEL && in smu_v13_0_6_populate_umd_state_clk() 622 mem_table->dpm_levels[SMU_13_0_6_UMD_PSTATE_MCLK_LEVEL].value; in smu_v13_0_6_populate_umd_state_clk()
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H A D | smu_v13_0.c | 1699 struct smu_13_0_dpm_table *mem_table = in smu_v13_0_set_performance_level() local 1723 mclk_min = mclk_max = mem_table->max; in smu_v13_0_set_performance_level() 1731 mclk_min = mclk_max = mem_table->min; in smu_v13_0_set_performance_level() 1740 mclk_min = mem_table->min; in smu_v13_0_set_performance_level() 1741 mclk_max = mem_table->max; in smu_v13_0_set_performance_level()
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H A D | smu_v13_0_7_ppt.c | 1838 struct smu_13_0_dpm_table *mem_table = in smu_v13_0_7_populate_umd_state_clk() local 1862 pstate_table->uclk_pstate.min = mem_table->min; in smu_v13_0_7_populate_umd_state_clk() 1863 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v13_0_7_populate_umd_state_clk() 1882 pstate_table->uclk_pstate.standard = mem_table->max; in smu_v13_0_7_populate_umd_state_clk()
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H A D | smu_v13_0_0_ppt.c | 1860 struct smu_13_0_dpm_table *mem_table = in smu_v13_0_0_populate_umd_state_clk() local 1884 pstate_table->uclk_pstate.min = mem_table->min; in smu_v13_0_0_populate_umd_state_clk() 1885 pstate_table->uclk_pstate.peak = mem_table->max; in smu_v13_0_0_populate_umd_state_clk() 1904 pstate_table->uclk_pstate.standard = mem_table->max; in smu_v13_0_0_populate_umd_state_clk()
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/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | arcturus_ppt.h | 62 struct arcturus_single_dpm_table mem_table; member
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H A D | smu_v11_0.c | 1840 struct smu_11_0_dpm_table *mem_table = in smu_v11_0_set_performance_level() local 1855 mclk_min = mclk_max = mem_table->max; in smu_v11_0_set_performance_level() 1860 mclk_min = mclk_max = mem_table->min; in smu_v11_0_set_performance_level() 1866 mclk_min = mem_table->min; in smu_v11_0_set_performance_level() 1867 mclk_max = mem_table->max; in smu_v11_0_set_performance_level()
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H A D | arcturus_ppt.c | 535 struct smu_11_0_dpm_table *mem_table = in arcturus_populate_umd_state_clk() local 545 pstate_table->uclk_pstate.min = mem_table->min; in arcturus_populate_umd_state_clk() 546 pstate_table->uclk_pstate.peak = mem_table->max; in arcturus_populate_umd_state_clk() 552 mem_table->count > ARCTURUS_UMD_PSTATE_MCLK_LEVEL && in arcturus_populate_umd_state_clk() 557 mem_table->dpm_levels[ARCTURUS_UMD_PSTATE_MCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
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H A D | navi10_ppt.c | 1720 struct smu_11_0_dpm_table *mem_table = in navi10_populate_umd_state_clk() local 1778 pstate_table->uclk_pstate.min = mem_table->min; in navi10_populate_umd_state_clk() 1779 pstate_table->uclk_pstate.peak = mem_table->max; in navi10_populate_umd_state_clk() 1785 mem_table->max > NAVI10_UMD_PSTATE_PROFILING_MEMCLK && in navi10_populate_umd_state_clk()
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H A D | sienna_cichlid_ppt.c | 1480 struct smu_11_0_dpm_table *mem_table = in sienna_cichlid_populate_umd_state_clk() local 1491 pstate_table->uclk_pstate.min = mem_table->min; in sienna_cichlid_populate_umd_state_clk() 1492 pstate_table->uclk_pstate.peak = mem_table->max; in sienna_cichlid_populate_umd_state_clk()
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