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Searched refs:mdp5_write (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_encoder.c104 mdp5_write(mdp5_kms, REG_MDP5_INTF_HSYNC_CTL(intf), in mdp5_vid_encoder_mode_set()
107 mdp5_write(mdp5_kms, REG_MDP5_INTF_VSYNC_PERIOD_F0(intf), vsync_period); in mdp5_vid_encoder_mode_set()
108 mdp5_write(mdp5_kms, REG_MDP5_INTF_VSYNC_LEN_F0(intf), vsync_len); in mdp5_vid_encoder_mode_set()
109 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_HCTL(intf), in mdp5_vid_encoder_mode_set()
112 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_VSTART_F0(intf), display_v_start); in mdp5_vid_encoder_mode_set()
113 mdp5_write(mdp5_kms, REG_MDP5_INTF_DISPLAY_VEND_F0(intf), display_v_end); in mdp5_vid_encoder_mode_set()
114 mdp5_write(mdp5_kms, REG_MDP5_INTF_BORDER_COLOR(intf), 0); in mdp5_vid_encoder_mode_set()
115 mdp5_write(mdp5_kms, REG_MDP5_INTF_UNDERFLOW_COLOR(intf), 0xff); in mdp5_vid_encoder_mode_set()
116 mdp5_write(mdp5_kms, REG_MDP5_INTF_HSYNC_SKEW(intf), dtv_hsync_skew); in mdp5_vid_encoder_mode_set()
117 mdp5_write(mdp5_kms, REG_MDP5_INTF_POLARITY_CTL(intf), ctrl_pol); in mdp5_vid_encoder_mode_set()
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H A Dmdp5_cmd_encoder.c61 mdp5_write(mdp5_kms, REG_MDP5_PP_SYNC_CONFIG_VSYNC(pp_id), cfg); in pingpong_tearcheck_setup()
62 mdp5_write(mdp5_kms, in pingpong_tearcheck_setup()
65 mdp5_write(mdp5_kms, in pingpong_tearcheck_setup()
67 mdp5_write(mdp5_kms, REG_MDP5_PP_RD_PTR_IRQ(pp_id), mode->vdisplay + 1); in pingpong_tearcheck_setup()
68 mdp5_write(mdp5_kms, REG_MDP5_PP_START_POS(pp_id), mode->vdisplay); in pingpong_tearcheck_setup()
69 mdp5_write(mdp5_kms, REG_MDP5_PP_SYNC_THRESH(pp_id), in pingpong_tearcheck_setup()
72 mdp5_write(mdp5_kms, REG_MDP5_PP_AUTOREFRESH_CONFIG(pp_id), 0x0); in pingpong_tearcheck_setup()
98 mdp5_write(mdp5_kms, REG_MDP5_PP_TEAR_CHECK_EN(pp_id), 1); in pingpong_tearcheck_enable()
109 mdp5_write(mdp5_kms, REG_MDP5_PP_TEAR_CHECK_EN(pp_id), 0); in pingpong_tearcheck_disable()
194 mdp5_write(mdp5_kms, REG_MDP5_SPLIT_DPL_UPPER, data); in mdp5_cmd_encoder_set_split_display()
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H A Dmdp5_plane.c485 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_A(pipe), in set_scanout_locked()
489 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_B(pipe), in set_scanout_locked()
493 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC0_ADDR(pipe), in set_scanout_locked()
495 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC1_ADDR(pipe), in set_scanout_locked()
497 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC2_ADDR(pipe), in set_scanout_locked()
499 mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC3_ADDR(pipe), in set_scanout_locked()
509 mdp5_write(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe), value); in csc_disable()
527 mdp5_write(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe), mode); in csc_enable()
530 mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_0(pipe), in csc_enable()
533 mdp5_write(mdp5_kms, REG_MDP5_PIPE_CSC_1_MATRIX_COEFF_1(pipe), in csc_enable()
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H A Dmdp5_irq.c18 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_CLEAR, in mdp5_set_irqmask()
20 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_EN, irqmask); in mdp5_set_irqmask()
45 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff); in mdp5_irq_preinstall()
46 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000); in mdp5_irq_preinstall()
76 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000); in mdp5_irq_uninstall()
90 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, status); in mdp5_irq()
H A Dmdp5_crtc.c333 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_OP_MODE(lm, in blend_setup()
335 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_FG_ALPHA(lm, in blend_setup()
337 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_BG_ALPHA(lm, in blend_setup()
340 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_OP_MODE(r_lm, in blend_setup()
342 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_FG_ALPHA(r_lm, in blend_setup()
344 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_BG_ALPHA(r_lm, in blend_setup()
350 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_COLOR_OUT(lm), in blend_setup()
354 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_COLOR_OUT(r_lm), in blend_setup()
388 mdp5_write(mdp5_kms, REG_MDP5_LM_OUT_SIZE(lm), in mdp5_crtc_mode_set_nofb()
395 mdp5_write(mdp5_kms, REG_MDP5_LM_BLEND_COLOR_OUT(lm), val); in mdp5_crtc_mode_set_nofb()
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H A Dmdp5_smp.c263 mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_W_REG(i), in write_smp_alloc_regs()
265 mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_R_REG(i), in write_smp_alloc_regs()
279 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_0(pipe), in write_smp_fifo_regs()
281 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_1(pipe), in write_smp_fifo_regs()
283 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_2(pipe), in write_smp_fifo_regs()
H A Dmdp5_ctl.c88 mdp5_write(mdp5_kms, reg, data); in ctl_write()
131 mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, intf_sel); in set_display_intf()
605 mdp5_write(mdp5_kms, REG_MDP5_SPARE_0, 0); in mdp5_ctl_pair()
618 mdp5_write(mdp5_kms, REG_MDP5_SPARE_0, in mdp5_ctl_pair()
H A Dmdp5_kms.c55 mdp5_write(mdp5_kms, REG_MDP5_DISP_INTF_SEL, 0); in mdp5_hw_init()
599 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(i), 0); in mdp5_kms_init()
601 mdp5_write(mdp5_kms, REG_MDP5_INTF_FRAME_LINE_COUNT_EN(i), 0x3); in mdp5_kms_init()
H A Dmdp5_kms.h172 static inline void mdp5_write(struct mdp5_kms *mdp5_kms, u32 reg, u32 data) in mdp5_write() function