Searched refs:max_limits (Results 1 – 12 of 12) sorted by relevance
1268 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument1281 max_limits->sclk, in btc_adjust_clock_combinations()1288 max_limits->mclk, in btc_adjust_clock_combinations()2097 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local2109 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()2111 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()2114 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()2115 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()2116 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()2117 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()[all …]
48 const struct radeon_clock_and_voltage_limits *max_limits,
789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()[all …]
775 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local800 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()806 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()807 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()808 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()809 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()3895 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local3899 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()3901 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
2950 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3007 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3009 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3017 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3018 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3019 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3020 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()3021 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()3022 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()3023 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()[all …]
1948 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local1959 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()1963 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2082 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2084 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
3283 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument3296 max_limits->sclk, in btc_adjust_clock_combinations()3303 max_limits->mclk, in btc_adjust_clock_combinations()3426 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3480 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3482 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3490 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3491 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3492 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3493 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()[all …]
2209 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2220 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2224 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2343 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2345 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
3289 const struct phm_clock_and_voltage_limits *max_limits; in vega10_apply_state_adjust_rules() local3309 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()3317 max_limits->mclk) in vega10_apply_state_adjust_rules()3319 max_limits->mclk; in vega10_apply_state_adjust_rules()3321 max_limits->sclk) in vega10_apply_state_adjust_rules()3323 max_limits->sclk; in vega10_apply_state_adjust_rules()3340 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in vega10_apply_state_adjust_rules()3341 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()3357 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()3382 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()[all …]
3324 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local3342 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()3349 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()3350 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()3351 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()3352 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()3361 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()3362 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()3377 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()3412 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()[all …]
1831 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()1834 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()1835 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
2805 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()2808 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()2809 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()