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Searched refs:link_bw (Results 1 – 25 of 30) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c163 nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE]; in nouveau_dp_detect()
176 if (val && (i == 0 || val > nv_encoder->dp.link_bw)) in nouveau_dp_detect()
177 nv_encoder->dp.link_bw = val; in nouveau_dp_detect()
183 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, in nouveau_dp_detect()
187 nv_encoder->dcb->dpconf.link_bw); in nouveau_dp_detect()
191 if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw) in nouveau_dp_detect()
192 nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw; in nouveau_dp_detect()
195 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw); in nouveau_dp_detect()
291 max_rate = outp->dp.link_nr * outp->dp.link_bw; in nv50_dp_mode_valid()
H A Dnouveau_encoder.h75 int link_bw; member
H A Dnouveau_bios.c1478 entry->dpconf.link_bw = 162000; in parse_dcb20_entry()
1481 entry->dpconf.link_bw = 270000; in parse_dcb20_entry()
1484 entry->dpconf.link_bw = 540000; in parse_dcb20_entry()
1488 entry->dpconf.link_bw = 810000; in parse_dcb20_entry()
/openbmc/u-boot/board/gdsys/common/
H A Ddp501.c52 u8 link_bw; in dp501_link_training() local
58 link_bw = 0x0a; in dp501_link_training()
60 link_bw = 0x06; in dp501_link_training()
61 if (link_bw != val) in dp501_link_training()
63 val * 270, link_bw * 270); in dp501_link_training()
64 i2c_reg_write(addr, 0x5d, link_bw); /* set link_bw */ in dp501_link_training()
/openbmc/u-boot/drivers/video/tegra124/
H A Ddp.c429 link_cfg->link_bw); in tegra_dc_dp_dump_link_cfg()
452 switch (cfg->link_bw) { in _tegra_dp_lower_link_config()
455 cfg->link_bw = SOR_LINK_SPEED_G2_7; in _tegra_dp_lower_link_config()
459 cfg->link_bw = SOR_LINK_SPEED_G1_62; in _tegra_dp_lower_link_config()
463 cfg->link_bw = SOR_LINK_SPEED_G2_7; in _tegra_dp_lower_link_config()
470 debug("dp: Error link rate %d\n", cfg->link_bw); in _tegra_dp_lower_link_config()
485 const u32 link_rate = 27 * link_cfg->link_bw * 1000 * 1000; in tegra_dc_dp_calc_config()
708 link_cfg->link_bw = link_cfg->max_link_bw; in tegra_dc_dp_init_max_link_cfg()
737 u8 link_bw) in tegra_dp_set_link_bandwidth() argument
739 tegra_dc_sor_set_link_bandwidth(sor, link_bw); in tegra_dp_set_link_bandwidth()
[all …]
H A Dsor.c167 reg_val = (link_cfg->link_bw == SOR_LINK_SPEED_G5_4) ? in tegra_dc_sor_set_dp_linkctl()
279 tegra_dc_sor_set_link_bandwidth(dev, link_cfg->link_bw); in tegra_dc_sor_set_dp_mode()
386 void tegra_dc_sor_read_link_config(struct udevice *dev, u8 *link_bw, in tegra_dc_sor_read_link_config() argument
393 *link_bw = (reg_val & CLK_CNTRL_DP_LINK_SPEED_MASK) in tegra_dc_sor_read_link_config()
416 void tegra_dc_sor_set_link_bandwidth(struct udevice *dev, u8 link_bw) in tegra_dc_sor_set_link_bandwidth() argument
422 link_bw << CLK_CNTRL_DP_LINK_SPEED_SHIFT); in tegra_dc_sor_set_link_bandwidth()
843 tegra_dc_sor_set_link_bandwidth(dev, link_cfg->link_bw); in tegra_dc_sor_set_lane_parm()
867 switch (link_cfg->link_bw) { in tegra_dc_sor_set_voltage_swing()
876 debug("Invalid sor link bandwidth: %d\n", link_cfg->link_bw); in tegra_dc_sor_set_voltage_swing()
H A Dsor.h853 u8 link_bw; member
883 void tegra_dc_sor_set_link_bandwidth(struct udevice *dev, u8 link_bw);
888 void tegra_dc_sor_read_link_config(struct udevice *dev, u8 *link_bw,
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Ddcb.c147 outp->dpconf.link_bw = 0x06; in dcb_outp_parse()
150 outp->dpconf.link_bw = 0x0a; in dcb_outp_parse()
153 outp->dpconf.link_bw = 0x14; in dcb_outp_parse()
157 outp->dpconf.link_bw = 0x1e; in dcb_outp_parse()
/openbmc/linux/drivers/gpu/drm/nouveau/nvif/
H A Doutp.c131 int link_nr, int link_bw, bool hda, bool mst) in nvif_outp_acquire_dp() argument
137 args.dp.link_bw = link_bw; in nvif_outp_acquire_dp()
145 args.dp.link_nr, args.dp.link_bw, args.dp.hda, args.dp.mst, args.or, args.link); in nvif_outp_acquire_dp()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c692 u8 link_bw, u8 rate_select) in intel_dp_update_link_bw_set() argument
699 if (link_bw) { in intel_dp_update_link_bw_set()
701 u8 link_config[] = { link_bw, lane_count }; in intel_dp_update_link_bw_set()
728 u8 link_bw, rate_select; in intel_dp_prepare_link_train() local
734 &link_bw, &rate_select); in intel_dp_prepare_link_train()
747 if (!link_bw) { in intel_dp_prepare_link_train()
756 if (link_bw) in intel_dp_prepare_link_train()
758 link_bw); in intel_dp_prepare_link_train()
768 intel_dp_update_link_bw_set(intel_dp, crtc_state, link_bw, in intel_dp_prepare_link_train()
H A Dintel_fdi.c241 int lane, link_bw, fdi_dotclock, ret; in ilk_fdi_compute_config() local
252 link_bw = intel_fdi_link_freq(i915, pipe_config); in ilk_fdi_compute_config()
256 lane = ilk_get_lanes_required(fdi_dotclock, link_bw, in ilk_fdi_compute_config()
262 link_bw, &pipe_config->fdi_m_n, false); in ilk_fdi_compute_config()
H A Dintel_dp.h85 u8 *link_bw, u8 *rate_select);
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
H A Danx9805.c193 int link_nr, int link_bw, bool enh) in anx9805_aux_lnk_ctl() argument
201 link_nr, link_bw, enh); in anx9805_aux_lnk_ctl()
203 nvkm_wri2cr(adap, aux->addr, 0xa0, link_bw); in anx9805_aux_lnk_ctl()
H A Daux.h17 int (*lnk_ctl)(struct nvkm_i2c_aux *, int link_nr, int link_bw,
/openbmc/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c261 uint8_t link_bw; member
356 cdv_intel_dp_link_clock(uint8_t link_bw) in cdv_intel_dp_link_clock() argument
358 if (link_bw == DP_LINK_BW_2_7) in cdv_intel_dp_link_clock()
916 intel_dp->link_bw = bws[clock]; in cdv_intel_dp_mode_fixup()
918 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
921 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
930 intel_dp->link_bw = bws[max_clock]; in cdv_intel_dp_mode_fixup()
931 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
934 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
1070 intel_dp->link_configuration[0] = intel_dp->link_bw; in cdv_intel_dp_mode_set()
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvif/
H A Doutp.h26 int link_nr, int link_bw, bool hda, bool mst);
H A Dif0012.h64 __u8 link_bw; /* 0 = highest possible, DP BW code otherwise. */ member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c663 uint32_t link_bw; in decide_dp_link_settings() local
674 link_bw = dp_link_bandwidth_kbps( in decide_dp_link_settings()
677 if (req_bw <= link_bw) { in decide_dp_link_settings()
704 uint32_t link_bw; in edp_decide_link_settings() local
729 link_bw = dp_link_bandwidth_kbps( in edp_decide_link_settings()
732 if (req_bw <= link_bw) { in edp_decide_link_settings()
763 uint32_t link_bw; in decide_edp_link_settings_with_dsc() local
792 link_bw = dp_link_bandwidth_kbps( in decide_edp_link_settings_with_dsc()
795 if (req_bw <= link_bw) { in decide_edp_link_settings_with_dsc()
849 link_bw = dp_link_bandwidth_kbps( in decide_edp_link_settings_with_dsc()
[all …]
H A Dlink_dp_training.c1704 uint32_t link_bw; in perform_link_training_with_retries() local
1719 link_bw = dp_link_bandwidth_kbps(link, &cur_link_settings); in perform_link_training_with_retries()
1720 is_link_bw_low = (req_bw > link_bw); in perform_link_training_with_retries()
1727 __func__, link->link_index, req_bw, link_bw); in perform_link_training_with_retries()
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Ddcb.h49 int link_bw; member
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Duoutp.c150 u8 link_nr, u8 link_bw, bool hda, bool mst) in nvkm_uoutp_mthd_acquire_dp() argument
160 outp->dp.lt.bw = link_bw; in nvkm_uoutp_mthd_acquire_dp()
238 args->v0.dp.link_bw, in nvkm_uoutp_mthd_acquire()
H A Ddp.c615 if (rate > outp->info.dpconf.link_bw * 27000) { in nvkm_dp_enable_supported_link_rates()
750 rate_max = min(rate_max, outp->info.dpconf.link_bw); in nvkm_dp_enable()
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Di2c.h57 int nvkm_i2c_aux_lnk_ctl(struct nvkm_i2c_aux *, int link_nr, int link_bw,
/openbmc/u-boot/drivers/video/
H A Dlogicore_dp_tx.c1890 u32 link_bw; in cfg_msa_recalculate() local
1981 link_bw = (link_config->lane_count * link_config->link_rate * 27); in cfg_msa_recalculate()
1984 link_bw; in cfg_msa_recalculate()
/openbmc/linux/include/drm/display/
H A Ddrm_dp_helper.h70 int drm_dp_bw_code_to_link_rate(u8 link_bw);

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