Home
last modified time | relevance | path

Searched refs:ixSQ_WAVE_M0 (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h85 #define ixSQ_WAVE_M0 0x027C macro
H A Dgfx_7_2_d.h1941 #define ixSQ_WAVE_M0 0x27c macro
H A Dgfx_7_0_d.h1920 #define ixSQ_WAVE_M0 0x27c macro
H A Dgfx_8_1_d.h2108 #define ixSQ_WAVE_M0 0x27c macro
H A Dgfx_8_0_d.h2140 #define ixSQ_WAVE_M0 0x27c macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2992 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v6_0_read_wave_data()
H A Dgfx_v7_0.c4133 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v7_0_read_wave_data()
H A Dgfx_v9_4_3.c594 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_M0); in gfx_v9_4_3_read_wave_data()
H A Dgfx_v11_0.c802 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); in gfx_v11_0_read_wave_data()
H A Dgfx_v8_0.c5239 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v8_0_read_wave_data()
H A Dgfx_v9_0.c1788 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v9_0_read_wave_data()
H A Dgfx_v10_0.c4294 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); in gfx_v10_0_read_wave_data()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7127 #define ixSQ_WAVE_M0 macro
H A Dgc_9_4_3_offset.h7437 #define ixSQ_WAVE_M0 macro
H A Dgc_9_1_offset.h7335 #define ixSQ_WAVE_M0 macro
H A Dgc_9_4_2_offset.h7674 #define ixSQ_WAVE_M0 macro
H A Dgc_9_2_1_offset.h7374 #define ixSQ_WAVE_M0 macro
H A Dgc_10_1_0_offset.h11210 #define ixSQ_WAVE_M0 macro
H A Dgc_11_0_3_offset.h12088 #define ixSQ_WAVE_M0 macro
H A Dgc_11_0_0_offset.h11670 #define ixSQ_WAVE_M0 macro
H A Dgc_10_3_0_offset.h13459 #define ixSQ_WAVE_M0 macro