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Searched refs:ixSQ_WAVE_LDS_ALLOC (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h84 #define ixSQ_WAVE_LDS_ALLOC 0x0016 macro
H A Dgfx_7_2_d.h1939 #define ixSQ_WAVE_LDS_ALLOC 0x16 macro
H A Dgfx_7_0_d.h1918 #define ixSQ_WAVE_LDS_ALLOC 0x16 macro
H A Dgfx_8_1_d.h2106 #define ixSQ_WAVE_LDS_ALLOC 0x16 macro
H A Dgfx_8_0_d.h2138 #define ixSQ_WAVE_LDS_ALLOC 0x16 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2984 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v6_0_read_wave_data()
H A Dgfx_v7_0.c4125 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v7_0_read_wave_data()
H A Dgfx_v9_4_3.c590 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v9_4_3_read_wave_data()
H A Dgfx_v11_0.c797 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v11_0_read_wave_data()
H A Dgfx_v8_0.c5231 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v8_0_read_wave_data()
H A Dgfx_v9_0.c1784 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v9_0_read_wave_data()
H A Dgfx_v10_0.c4289 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v10_0_read_wave_data()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7102 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_9_4_3_offset.h7412 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_9_1_offset.h7310 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_9_4_2_offset.h7650 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_9_2_1_offset.h7349 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_10_1_0_offset.h11181 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_11_0_3_offset.h12058 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_11_0_0_offset.h11641 #define ixSQ_WAVE_LDS_ALLOC … macro
H A Dgc_10_3_0_offset.h13427 #define ixSQ_WAVE_LDS_ALLOC … macro