Searched refs:intr_set (Results 1 – 3 of 3) sorted by relevance
258 irq_status = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].status_off); in dpu_core_irq()261 enable_mask = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].en_off); in dpu_core_irq()265 DPU_REG_WRITE(&intr->hw, intr->intr_set[reg_idx].clr_off, in dpu_core_irq()323 reg = &intr->intr_set[reg_idx]; in dpu_hw_intr_enable_irq_locked()378 reg = &intr->intr_set[reg_idx]; in dpu_hw_intr_disable_irq_locked()416 intr->intr_set[i].clr_off, 0xffffffff); in dpu_clear_irqs()434 intr->intr_set[i].en_off, 0x00000000); in dpu_disable_all_irqs()460 intr->intr_set[reg_idx].status_off) & in dpu_core_irq_read()463 DPU_REG_WRITE(&intr->hw, intr->intr_set[reg_idx].clr_off, in dpu_core_irq_read()488 intr->intr_set = dpu_intr_set_7xxx; in dpu_hw_intr_init()[all …]
66 const struct dpu_intr_reg *intr_set; member
1209 u32 intr_set; member1433 hw->intr_set = readl(hw->io + KS884X_INTERRUPTS_ENABLE); in hw_dis_intr()1438 hw->intr_set = interrupt; in hw_set_intr()1458 hw->intr_set = read_intr & ~interrupt; in hw_turn_off_intr()1459 writel(hw->intr_set, hw->io + KS884X_INTERRUPTS_ENABLE); in hw_turn_off_intr()1482 *status = *status & hw->intr_set; in hw_read_intr()