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Searched refs:intel_uncore_read_fw (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_pm_debugfs.c92 mt_fwake_req = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in vlv_drpc()
119 mt_fwake_req = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in gen6_drpc()
120 gt_core_status = intel_uncore_read_fw(uncore, GEN6_GT_CORE_STATUS); in gen6_drpc()
266 mt_fwake_req = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in mtl_drpc()
517 rpup = intel_uncore_read_fw(uncore, GEN6_RP_CUR_UP) & GEN6_RP_EI_MASK; in rps_boost_show()
518 rpupei = intel_uncore_read_fw(uncore, GEN6_RP_CUR_UP_EI) & GEN6_RP_EI_MASK; in rps_boost_show()
519 rpdown = intel_uncore_read_fw(uncore, GEN6_RP_CUR_DOWN) & GEN6_RP_EI_MASK; in rps_boost_show()
520 rpdownei = intel_uncore_read_fw(uncore, GEN6_RP_CUR_DOWN_EI) & GEN6_RP_EI_MASK; in rps_boost_show()
H A Dintel_gt_mcr.c285 mcr = intel_uncore_read_fw(uncore, GEN8_MCR_SELECTOR); in rw_with_mcr_steering_fw()
295 mcr = intel_uncore_read_fw(uncore, GEN8_MCR_SELECTOR); in rw_with_mcr_steering_fw()
304 val = intel_uncore_read_fw(uncore, mcr_reg_cast(reg)); in rw_with_mcr_steering_fw()
395 err = wait_for(intel_uncore_read_fw(gt->uncore, in intel_gt_mcr_lock()
727 return intel_uncore_read_fw(gt->uncore, mcr_reg_cast(reg)); in intel_gt_mcr_read_any_fw()
H A Dselftest_rc6.c99 intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE), in live_rc6_manual()
100 intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL), in live_rc6_manual()
H A Dintel_rc6.c774 upper = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
780 lower = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
784 upper = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
831 time_hw = intel_uncore_read_fw(uncore, reg); in intel_rc6_residency_ns()
H A Dselftest_rps.c288 if (wait_for(intel_uncore_read_fw(gt->uncore, in live_rps_clock_interval()
303 cycles_[i] = -intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
308 cycles_[i] += intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
570 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)); in __measure_cs_frequency()
573 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)) - dc; in __measure_cs_frequency()
H A Dintel_reset.c434 if (!(intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & sfc_lock.usage_bit)) { in gen11_lock_sfc()
448 if (!(intel_uncore_read_fw(uncore, in gen11_lock_sfc()
488 lock_obtained = (intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & in gen11_lock_sfc()
572 ack = intel_uncore_read_fw(uncore, reg); in gen8_engine_reset_prepare()
598 intel_uncore_read_fw(uncore, reg)); in gen8_engine_reset_prepare()
H A Dintel_workarounds.c1001 intel_uncore_read_fw(uncore, wa->reg); in intel_engine_emit_ctx_wa()
1826 intel_uncore_read_fw(uncore, wa->reg); in wa_list_apply()
1838 intel_uncore_read_fw(uncore, wa->reg); in wa_list_apply()
1874 intel_uncore_read_fw(uncore, wa->reg), in wa_list_verify()
H A Dintel_ggtt.c189 intel_uncore_read_fw(uncore, GFX_FLSH_CNTL_GEN6); in gen6_ggtt_invalidate()
H A Dintel_rps.c2121 freq = take_fw ? intel_uncore_read(uncore, r) : intel_uncore_read_fw(uncore, r); in __read_cagf()
/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_uncore.h430 #define intel_uncore_read_fw(...) __raw_uncore_read32(__VA_ARGS__) macro
433 #define intel_uncore_posting_read_fw(...) ((void)intel_uncore_read_fw(__VA_ARGS__))
451 old = intel_uncore_read_fw(uncore, reg); in intel_uncore_rmw_fw()
474 upper = intel_uncore_read_fw(uncore, upper_reg); in intel_uncore_read64_2x32()
477 lower = intel_uncore_read_fw(uncore, lower_reg); in intel_uncore_read64_2x32()
478 upper = intel_uncore_read_fw(uncore, upper_reg); in intel_uncore_read64_2x32()
H A Dintel_pcode.c68 if (intel_uncore_read_fw(uncore, GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) in __snb_pcode_rw()
85 *val = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA); in __snb_pcode_rw()
87 *val1 = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA1); in __snb_pcode_rw()
H A Dintel_sbi.c55 *val = intel_uncore_read_fw(uncore, SBI_DATA); in intel_sbi_rw()
H A Dvlv_sideband.c114 *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); in vlv_sideband_rw()
H A Di915_gpu_error.c1850 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_VLV); in gt_record_global_regs()
1873 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE); in gt_record_global_regs()
1880 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in gt_record_global_regs()
H A Dintel_uncore.c2877 #define done (((reg_value = intel_uncore_read_fw(uncore, reg)) & mask) == value) in __intel_wait_for_register_fw()
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio_context.c186 intel_uncore_read_fw(uncore, offset); in load_render_mocs()
194 intel_uncore_read_fw(uncore, offset); in load_render_mocs()
388 if (wait_for_atomic(intel_uncore_read_fw(uncore, reg) == 0, 50)) in handle_tlb_pending_event()
500 intel_uncore_read_fw(uncore, mmio->reg); in switch_mmio()
507 intel_uncore_read_fw(uncore, mmio->reg); in switch_mmio()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_de.h101 val = intel_uncore_read_fw(&i915->uncore, reg); in intel_de_read_fw()
H A Di9xx_wm.c1788 dsparb = intel_uncore_read_fw(uncore, DSPARB); in vlv_atomic_update_fifo()
1789 dsparb2 = intel_uncore_read_fw(uncore, DSPARB2); in vlv_atomic_update_fifo()
1805 dsparb = intel_uncore_read_fw(uncore, DSPARB); in vlv_atomic_update_fifo()
1806 dsparb2 = intel_uncore_read_fw(uncore, DSPARB2); in vlv_atomic_update_fifo()
1822 dsparb3 = intel_uncore_read_fw(uncore, DSPARB3); in vlv_atomic_update_fifo()
1823 dsparb2 = intel_uncore_read_fw(uncore, DSPARB2); in vlv_atomic_update_fifo()
/openbmc/linux/drivers/gpu/drm/i915/soc/
H A Dintel_dram.c707 edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP); in intel_dram_edram_detect()
/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_uc_fw.c1101 intel_uncore_read_fw(uncore, DMA_CTRL)); in uc_fw_xfer()