| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mmhub_v1_8.c | 58 u32 inst_mask; in mmhub_v1_8_setup_vm_pt_regs() local
61 inst_mask = adev->aid_mask; in mmhub_v1_8_setup_vm_pt_regs()
62 for_each_inst(i, inst_mask) { in mmhub_v1_8_setup_vm_pt_regs()
79 u32 inst_mask; in mmhub_v1_8_init_gart_aperture_regs() local
92 inst_mask = adev->aid_mask; in mmhub_v1_8_init_gart_aperture_regs()
93 for_each_inst(i, inst_mask) { in mmhub_v1_8_init_gart_aperture_regs()
129 uint32_t tmp, inst_mask; in mmhub_v1_8_init_system_aperture_regs() local
136 inst_mask = adev->aid_mask; in mmhub_v1_8_init_system_aperture_regs()
137 for_each_inst(i, inst_mask) { in mmhub_v1_8_init_system_aperture_regs()
192 uint32_t tmp, inst_mask; in mmhub_v1_8_init_tlb_regs() local
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| H A D | sdma_v4_4_2.c | 100 uint32_t inst_mask) in sdma_v4_4_2_inst_init_golden_registers() argument
427 uint32_t inst_mask) in sdma_v4_4_2_inst_gfx_stop() argument
433 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_gfx_stop()
459 uint32_t inst_mask) in sdma_v4_4_2_inst_rlc_stop() argument
473 uint32_t inst_mask) in sdma_v4_4_2_inst_page_stop() argument
480 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_page_stop()
510 bool enable, uint32_t inst_mask) in sdma_v4_4_2_inst_ctx_switch_enable() argument
539 for_each_inst(i, inst_mask) { in sdma_v4_4_2_inst_ctx_switch_enable()
565 uint32_t inst_mask) in sdma_v4_4_2_inst_enable() argument
571 sdma_v4_4_2_inst_gfx_stop(adev, inst_mask); in sdma_v4_4_2_inst_enable()
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| H A D | aqua_vanjaram.c | 74 uint32_t inst_mask; in aqua_vanjaram_set_xcp_id() local
80 inst_mask = 1 << inst_idx; in aqua_vanjaram_set_xcp_id()
95 inst_mask = 1 << (inst_idx * 2); in aqua_vanjaram_set_xcp_id()
103 if (adev->xcp_mgr->xcp[xcp_id].ip[ip_blk].inst_mask & inst_mask) { in aqua_vanjaram_set_xcp_id()
258 uint32_t inst_mask) in aqua_vanjaram_populate_ip_map() argument
262 while (inst_mask) { in aqua_vanjaram_populate_ip_map()
263 i = ffs(inst_mask) - 1; in aqua_vanjaram_populate_ip_map()
265 inst_mask &= ~(1 << i); in aqua_vanjaram_populate_ip_map()
276 { VCN_HWIP, adev->vcn.inst_mask }, in aqua_vanjaram_ip_map_init()
384 ip->inst_mask = XCP_INST_MASK(num_xcc_xcp, xcp_id); in __aqua_vanjaram_get_xcp_ip_info()
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| H A D | amdgpu_xcp.h | 60 int (*prepare_suspend)(void *handle, uint32_t inst_mask);
61 int (*suspend)(void *handle, uint32_t inst_mask);
62 int (*prepare_resume)(void *handle, uint32_t inst_mask);
63 int (*resume)(void *handle, uint32_t inst_mask);
68 uint32_t inst_mask; member
137 uint32_t *inst_mask);
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| H A D | amdgpu_xcp.c | 33 int (*run_func)(void *handle, uint32_t inst_mask); in __amdgpu_xcp_run()
57 ret = run_func(xcp_mgr->adev, xcp_ip->inst_mask); in __amdgpu_xcp_run()
305 (xcp->ip[ip].inst_mask & BIT(instance))) in amdgpu_xcp_get_partition()
317 uint32_t *inst_mask) in amdgpu_xcp_get_inst_details() argument
319 if (!xcp->valid || !inst_mask || !(xcp->ip[ip].valid)) in amdgpu_xcp_get_inst_details()
322 *inst_mask = xcp->ip[ip].inst_mask; in amdgpu_xcp_get_inst_details()
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| H A D | gfxhub_v1_2.c | 627 static int gfxhub_v1_2_xcp_resume(void *handle, uint32_t inst_mask) in gfxhub_v1_2_xcp_resume() argument
637 gfxhub_v1_2_xcc_set_fault_enable_default(adev, value, inst_mask); in gfxhub_v1_2_xcp_resume()
640 return gfxhub_v1_2_xcc_gart_enable(adev, inst_mask); in gfxhub_v1_2_xcp_resume()
645 static int gfxhub_v1_2_xcp_suspend(void *handle, uint32_t inst_mask) in gfxhub_v1_2_xcp_suspend() argument
650 gfxhub_v1_2_xcc_gart_disable(adev, inst_mask); in gfxhub_v1_2_xcp_suspend()
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| H A D | amdgpu_jpeg.h | 64 uint16_t inst_mask; member
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| H A D | amdgpu_discovery.c | 337 adev->vcn.inst_mask &= ~AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
576 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
578 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
582 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
584 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
636 adev->vcn.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
638 adev->jpeg.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
924 harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; in amdgpu_discovery_get_harvest_info()
1227 adev->vcn.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1228 adev->jpeg.inst_mask = 0; in amdgpu_discovery_reg_base_init()
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| H A D | nbio_v7_9.c | 426 u32 inst_mask; in nbio_v7_9_init_registers() local
440 inst_mask = adev->aid_mask & ~1U; in nbio_v7_9_init_registers()
441 for_each_inst(i, inst_mask) { in nbio_v7_9_init_registers()
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| H A D | amdgpu_ras.c | 340 uint32_t mask, inst_mask = data->inject.instance_mask; in amdgpu_ras_instance_mask_check() local
343 if (num_xcc <= 1 && inst_mask) { in amdgpu_ras_instance_mask_check()
347 inst_mask); in amdgpu_ras_instance_mask_check()
364 mask = inst_mask; in amdgpu_ras_instance_mask_check()
370 if (inst_mask != data->inject.instance_mask) in amdgpu_ras_instance_mask_check()
373 inst_mask, data->inject.instance_mask); in amdgpu_ras_instance_mask_check()
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| H A D | amdgpu_vcn.h | 285 uint16_t inst_mask; member
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| H A D | amdgpu.h | 1283 #define for_each_inst(i, inst_mask) \ argument
1284 for (i = ffs(inst_mask); i-- != 0; \
1285 i = ffs(inst_mask & BIT_MASK_UPPER(i + 1)))
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| H A D | gmc_v9_0.c | 2018 unsigned long inst_mask = adev->aid_mask; in gmc_v9_0_sw_init() local
2115 inst_mask <<= AMDGPU_MMHUB0(0); in gmc_v9_0_sw_init()
2116 bitmap_or(adev->vmhubs_mask, adev->vmhubs_mask, &inst_mask, 32); in gmc_v9_0_sw_init()
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| H A D | gfx_v9_4_3.c | 4372 static int gfx_v9_4_3_xcp_resume(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_resume() argument
4381 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
4386 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
4394 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
4404 static int gfx_v9_4_3_xcp_suspend(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_suspend() argument
4409 for_each_inst(i, inst_mask) in gfx_v9_4_3_xcp_suspend()
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