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Searched refs:insn (Results 1 – 25 of 770) sorted by relevance

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/openbmc/linux/arch/x86/lib/
H A Dinsn.c37 #define validate_next(t, insn, n) \ argument
38 ((insn)->next_byte + sizeof(t) + n <= (insn)->end_kaddr)
40 #define __get_next(t, insn) \ argument
41 …({ t r = get_unaligned((t *)(insn)->next_byte); (insn)->next_byte += sizeof(t); leXX_to_cpu(t, r);…
43 #define __peek_nbyte_next(t, insn, n) \ argument
44 ({ t r = get_unaligned((t *)(insn)->next_byte + n); leXX_to_cpu(t, r); })
46 #define get_next(t, insn) \ argument
47 ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); })
49 #define peek_nbyte_next(t, insn, n) \ argument
50 ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); })
[all …]
H A Dinsn-eval.c38 static bool is_string_insn(struct insn *insn) in is_string_insn() argument
41 if (insn->opcode.nbytes != 1) in is_string_insn()
44 switch (insn->opcode.bytes[0]) { in is_string_insn()
62 bool insn_has_rep_prefix(struct insn *insn) in insn_has_rep_prefix() argument
67 insn_get_prefixes(insn); in insn_has_rep_prefix()
69 for_each_insn_prefix(insn, i, p) { in insn_has_rep_prefix()
91 static int get_seg_reg_override_idx(struct insn *insn) in get_seg_reg_override_idx() argument
97 insn_get_prefixes(insn); in get_seg_reg_override_idx()
100 for_each_insn_prefix(insn, i, p) { in get_seg_reg_override_idx()
154 static bool check_seg_overrides(struct insn *insn, int regoff) in check_seg_overrides() argument
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/openbmc/linux/tools/arch/x86/lib/
H A Dinsn.c37 #define validate_next(t, insn, n) \ argument
38 ((insn)->next_byte + sizeof(t) + n <= (insn)->end_kaddr)
40 #define __get_next(t, insn) \ argument
41 …({ t r = get_unaligned((t *)(insn)->next_byte); (insn)->next_byte += sizeof(t); leXX_to_cpu(t, r);…
43 #define __peek_nbyte_next(t, insn, n) \ argument
44 ({ t r = get_unaligned((t *)(insn)->next_byte + n); leXX_to_cpu(t, r); })
46 #define get_next(t, insn) \ argument
47 ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); })
49 #define peek_nbyte_next(t, insn, n) \ argument
50 ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); })
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/openbmc/linux/kernel/bpf/
H A Ddisasm.c17 const struct bpf_insn *insn, in __func_get_name() argument
22 if (!insn->src_reg && in __func_get_name()
23 insn->imm >= 0 && insn->imm < __BPF_FUNC_MAX_ID && in __func_get_name()
24 func_id_str[insn->imm]) in __func_get_name()
25 return func_id_str[insn->imm]; in __func_get_name()
30 res = cbs->cb_call(cbs->private_data, insn); in __func_get_name()
35 if (insn->src_reg == BPF_PSEUDO_CALL) in __func_get_name()
36 snprintf(buff, len, "%+d", insn->imm); in __func_get_name()
37 else if (insn->src_reg == BPF_PSEUDO_KFUNC_CALL) in __func_get_name()
44 const struct bpf_insn *insn, in __func_imm_name() argument
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/openbmc/linux/tools/testing/selftests/bpf/
H A Ddisasm.c17 const struct bpf_insn *insn, in __func_get_name() argument
22 if (!insn->src_reg && in __func_get_name()
23 insn->imm >= 0 && insn->imm < __BPF_FUNC_MAX_ID && in __func_get_name()
24 func_id_str[insn->imm]) in __func_get_name()
25 return func_id_str[insn->imm]; in __func_get_name()
30 res = cbs->cb_call(cbs->private_data, insn); in __func_get_name()
35 if (insn->src_reg == BPF_PSEUDO_CALL) in __func_get_name()
36 snprintf(buff, len, "%+d", insn->imm); in __func_get_name()
37 else if (insn->src_reg == BPF_PSEUDO_KFUNC_CALL) in __func_get_name()
44 const struct bpf_insn *insn, in __func_imm_name() argument
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/openbmc/linux/arch/arm64/lib/
H A Dinsn.c88 u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn) in aarch64_insn_decode_immediate() argument
96 immlo = (insn >> ADR_IMM_LOSHIFT) & ADR_IMM_LOMASK; in aarch64_insn_decode_immediate()
97 immhi = (insn >> ADR_IMM_HISHIFT) & ADR_IMM_HIMASK; in aarch64_insn_decode_immediate()
98 insn = (immhi << ADR_IMM_HILOSPLIT) | immlo; in aarch64_insn_decode_immediate()
109 return (insn >> shift) & mask; in aarch64_insn_decode_immediate()
113 u32 insn, u64 imm) in aarch64_insn_encode_immediate() argument
118 if (insn == AARCH64_BREAK_FAULT) in aarch64_insn_encode_immediate()
140 insn &= ~(mask << shift); in aarch64_insn_encode_immediate()
141 insn |= (imm & mask) << shift; in aarch64_insn_encode_immediate()
143 return insn; in aarch64_insn_encode_immediate()
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/openbmc/linux/arch/x86/include/asm/
H A Dinsn.h68 struct insn { struct
134 extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);
135 extern int insn_get_prefixes(struct insn *insn);
136 extern int insn_get_opcode(struct insn *insn);
137 extern int insn_get_modrm(struct insn *insn);
138 extern int insn_get_sib(struct insn *insn);
139 extern int insn_get_displacement(struct insn *insn);
140 extern int insn_get_immediate(struct insn *insn);
141 extern int insn_get_length(struct insn *insn);
151 extern int insn_decode(struct insn *insn, const void *kaddr, int buf_len, enum insn_mode m);
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/openbmc/linux/tools/arch/x86/include/asm/
H A Dinsn.h68 struct insn { struct
134 extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);
135 extern int insn_get_prefixes(struct insn *insn);
136 extern int insn_get_opcode(struct insn *insn);
137 extern int insn_get_modrm(struct insn *insn);
138 extern int insn_get_sib(struct insn *insn);
139 extern int insn_get_displacement(struct insn *insn);
140 extern int insn_get_immediate(struct insn *insn);
141 extern int insn_get_length(struct insn *insn);
151 extern int insn_decode(struct insn *insn, const void *kaddr, int buf_len, enum insn_mode m);
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/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dxtensa-modules.c.inc377 Field_t_Slot_inst_get (const xtensa_insnbuf insn)
380 tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
385 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
389 insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
393 Field_s_Slot_inst_get (const xtensa_insnbuf insn)
396 tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
401 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
405 insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
409 Field_r_Slot_inst_get (const xtensa_insnbuf insn)
412 tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
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/openbmc/linux/arch/powerpc/xmon/
H A Dspu.h80 #define SIGNED_EXTRACT(insn,size,pos) (((int)((insn) << (32-size-pos))) >> (32-size)) argument
81 #define UNSIGNED_EXTRACT(insn,size,pos) (((insn) >> pos) & ((1 << size)-1)) argument
83 #define DECODE_INSN_RT(insn) (insn & 0x7f) argument
84 #define DECODE_INSN_RA(insn) ((insn >> 7) & 0x7f) argument
85 #define DECODE_INSN_RB(insn) ((insn >> 14) & 0x7f) argument
86 #define DECODE_INSN_RC(insn) ((insn >> 21) & 0x7f) argument
88 #define DECODE_INSN_I10(insn) SIGNED_EXTRACT(insn,10,14) argument
89 #define DECODE_INSN_U10(insn) UNSIGNED_EXTRACT(insn,10,14) argument
92 #define DECODE_INSN_I16(insn) SIGNED_EXTRACT(insn,16,7) argument
93 #define DECODE_INSN_U16(insn) UNSIGNED_EXTRACT(insn,16,7) argument
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/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dxtensa-modules.c.inc223 Field_t_Slot_inst_get (const xtensa_insnbuf insn)
226 tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
231 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
235 insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
239 Field_s_Slot_inst_get (const xtensa_insnbuf insn)
242 tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
247 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
251 insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
255 Field_r_Slot_inst_get (const xtensa_insnbuf insn)
258 tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
[all …]
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dxtensa-modules.c.inc308 Field_t_Slot_inst_get (const xtensa_insnbuf insn)
311 tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28);
316 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
320 insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16);
324 Field_s_Slot_inst_get (const xtensa_insnbuf insn)
327 tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
332 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
336 insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
340 Field_r_Slot_inst_get (const xtensa_insnbuf insn)
343 tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
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/openbmc/linux/tools/objtool/
H A Dcheck.c26 struct instruction *insn; member
40 struct instruction *insn; in find_insn() local
42 hash_for_each_possible(file->insn_hash, insn, hash, sec_offset_hash(sec, offset)) { in find_insn()
43 if (insn->sec == sec && insn->offset == offset) in find_insn()
44 return insn; in find_insn()
51 struct instruction *insn) in next_insn_same_sec() argument
53 if (insn->idx == INSN_CHUNK_MAX) in next_insn_same_sec()
54 return find_insn(file, insn->sec, insn->offset + insn->len); in next_insn_same_sec()
56 insn++; in next_insn_same_sec()
57 if (!insn->len) in next_insn_same_sec()
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/openbmc/linux/arch/s390/tools/
H A Dgen_opcode_table.c22 struct insn { struct
44 struct insn *insn; argument
154 struct insn insn; in read_instructions() local
158 rc = scanf("%s %s %s", insn.opcode, insn.name, insn.format); in read_instructions()
163 insn.type = insn_format_to_type(insn.format); in read_instructions()
164 insn.name_len = strlen(insn.name); in read_instructions()
165 for (i = 0; i <= insn.name_len; i++) in read_instructions()
166 insn.upper[i] = toupper((unsigned char)insn.name[i]); in read_instructions()
168 desc->insn = realloc(desc->insn, desc->nr * sizeof(*desc->insn)); in read_instructions()
169 if (!desc->insn) in read_instructions()
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/openbmc/linux/arch/riscv/kernel/
H A Dtraps_misaligned.c86 #define INSN_LEN(insn) ((((insn) & 0x3) < 0x3) ? 2 : 4) argument
119 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) argument
120 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) argument
121 #define RVC_RS2(insn) RV_X(insn, SH_RS2C, 5) argument
129 #define REG_OFFSET(insn, pos) \ argument
130 (SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
132 #define REG_PTR(insn, pos, regs) \ argument
133 (ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
135 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs)) argument
136 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs)) argument
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/openbmc/linux/arch/arm/probes/kprobes/
H A Dactions-thumb.c24 t32_simulate_table_branch(probes_opcode_t insn, in t32_simulate_table_branch() argument
28 int rn = (insn >> 16) & 0xf; in t32_simulate_table_branch()
29 int rm = insn & 0xf; in t32_simulate_table_branch()
35 if (insn & 0x10) /* TBH */ in t32_simulate_table_branch()
44 t32_simulate_mrs(probes_opcode_t insn, in t32_simulate_mrs() argument
47 int rd = (insn >> 8) & 0xf; in t32_simulate_mrs()
53 t32_simulate_cond_branch(probes_opcode_t insn, in t32_simulate_cond_branch() argument
58 long offset = insn & 0x7ff; /* imm11 */ in t32_simulate_cond_branch()
59 offset += (insn & 0x003f0000) >> 5; /* imm6 */ in t32_simulate_cond_branch()
60 offset += (insn & 0x00002000) << 4; /* J1 */ in t32_simulate_cond_branch()
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/openbmc/linux/arch/mips/kernel/
H A Dbranch.c62 union mips_instruction insn = (union mips_instruction)dec_insn.insn; in __mm_isBranchInstr() local
68 switch (insn.mm_i_format.opcode) { in __mm_isBranchInstr()
70 if ((insn.mm_i_format.simmediate & MM_POOL32A_MINOR_MASK) == in __mm_isBranchInstr()
72 switch (insn.mm_i_format.simmediate >> in __mm_isBranchInstr()
78 if (insn.mm_i_format.rt != 0) /* Not mm_jr */ in __mm_isBranchInstr()
79 regs->regs[insn.mm_i_format.rt] = in __mm_isBranchInstr()
83 *contpc = regs->regs[insn.mm_i_format.rs]; in __mm_isBranchInstr()
89 switch (insn.mm_i_format.rt) { in __mm_isBranchInstr()
97 if ((long)regs->regs[insn.mm_i_format.rs] < 0) in __mm_isBranchInstr()
100 (insn.mm_i_format.simmediate << 1); in __mm_isBranchInstr()
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/openbmc/qemu/hw/mips/
H A Dbootloader.c57 static void st_nm32_p(void **ptr, uint32_t insn) in st_nm32_p() argument
61 stw_p(p, insn >> 16); in st_nm32_p()
63 stw_p(p, insn >> 0); in st_nm32_p()
88 uint32_t insn = 0; in bl_gen_r_type() local
90 insn = deposit32(insn, 26, 6, opcode); in bl_gen_r_type()
91 insn = deposit32(insn, 21, 5, rs); in bl_gen_r_type()
92 insn = deposit32(insn, 16, 5, rt); in bl_gen_r_type()
93 insn = deposit32(insn, 11, 5, rd); in bl_gen_r_type()
94 insn = deposit32(insn, 6, 5, shift); in bl_gen_r_type()
95 insn = deposit32(insn, 0, 6, funct); in bl_gen_r_type()
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/openbmc/linux/arch/riscv/kvm/
H A Dvcpu_insn.c72 #define INSN_IS_16BIT(insn) (((insn) & INSN_16BIT_MASK) != INSN_16BIT_MASK) argument
74 #define INSN_LEN(insn) (INSN_IS_16BIT(insn) ? 2 : 4) argument
105 #define RVC_RS1S(insn) (8 + RV_X(insn, SH_RD, 3)) argument
106 #define RVC_RS2S(insn) (8 + RV_X(insn, SH_RS2C, 3)) argument
107 #define RVC_RS2(insn) RV_X(insn, SH_RS2C, 5) argument
115 #define REG_OFFSET(insn, pos) \ argument
116 (SHIFT_RIGHT((insn), (pos) - LOG_REGBYTES) & REG_MASK)
118 #define REG_PTR(insn, pos, regs) \ argument
119 ((ulong *)((ulong)(regs) + REG_OFFSET(insn, pos)))
121 #define GET_FUNCT3(insn) (((insn) >> 12) & 7) argument
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/openbmc/linux/arch/arm64/kernel/probes/
H A Ddecode-insn.c18 static bool __kprobes aarch64_insn_is_steppable(u32 insn) in aarch64_insn_is_steppable() argument
27 if (aarch64_insn_is_class_branch_sys(insn)) { in aarch64_insn_is_steppable()
28 if (aarch64_insn_is_branch(insn) || in aarch64_insn_is_steppable()
29 aarch64_insn_is_msr_imm(insn) || in aarch64_insn_is_steppable()
30 aarch64_insn_is_msr_reg(insn) || in aarch64_insn_is_steppable()
31 aarch64_insn_is_exception(insn) || in aarch64_insn_is_steppable()
32 aarch64_insn_is_eret(insn) || in aarch64_insn_is_steppable()
33 aarch64_insn_is_eret_auth(insn)) in aarch64_insn_is_steppable()
41 if (aarch64_insn_is_mrs(insn)) in aarch64_insn_is_steppable()
42 return aarch64_insn_extract_system_reg(insn) in aarch64_insn_is_steppable()
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/openbmc/qemu/target/hexagon/
H A Ddecode.c53 insn->regno[OPNUM] = DECODE_REGISTER_##NAME[insn->regno[OPNUM]];
69 Insn *insn = ctx->insn; in DECODE_MAPPED() local
70 if (!insn->extension_valid || in DECODE_MAPPED()
71 insn->which_extended != immno) { in DECODE_MAPPED()
107 tmpinsn = packet->insn[i]; in decode_send_insn_to()
108 packet->insn[i] = packet->insn[i + direction]; in decode_send_insn_to()
109 packet->insn[i + direction] = tmpinsn; in decode_send_insn_to()
120 if (GET_ATTRIB(packet->insn[i].opcode, A_DOTNEWVALUE) && in decode_fill_newvalue_regno()
121 !GET_ATTRIB(packet->insn[i].opcode, A_EXTENSION)) { in decode_fill_newvalue_regno()
123 g_assert(packet->insn[i].new_read_idx != -1); in decode_fill_newvalue_regno()
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/openbmc/linux/arch/csky/kernel/probes/
H A Ddecode-insn.c19 probe_opcode_t insn = le32_to_cpu(*addr); in csky_probe_decode_insn() local
21 CSKY_INSN_SET_SIMULATE(br16, insn); in csky_probe_decode_insn()
22 CSKY_INSN_SET_SIMULATE(bt16, insn); in csky_probe_decode_insn()
23 CSKY_INSN_SET_SIMULATE(bf16, insn); in csky_probe_decode_insn()
24 CSKY_INSN_SET_SIMULATE(jmp16, insn); in csky_probe_decode_insn()
25 CSKY_INSN_SET_SIMULATE(jsr16, insn); in csky_probe_decode_insn()
26 CSKY_INSN_SET_SIMULATE(lrw16, insn); in csky_probe_decode_insn()
27 CSKY_INSN_SET_SIMULATE(pop16, insn); in csky_probe_decode_insn()
29 CSKY_INSN_SET_SIMULATE(br32, insn); in csky_probe_decode_insn()
30 CSKY_INSN_SET_SIMULATE(bt32, insn); in csky_probe_decode_insn()
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/openbmc/linux/arch/sparc/kernel/
H A Dunaligned_32.c34 static inline enum direction decode_direction(unsigned int insn) in decode_direction() argument
36 unsigned long tmp = (insn >> 21) & 1; in decode_direction()
41 if(((insn>>19)&0x3f) == 15) in decode_direction()
49 static inline int decode_access_size(unsigned int insn) in decode_access_size() argument
51 insn = (insn >> 19) & 3; in decode_access_size()
53 if(!insn) in decode_access_size()
55 else if(insn == 3) in decode_access_size()
57 else if(insn == 2) in decode_access_size()
60 printk("Impossible unaligned trap. insn=%08x\n", insn); in decode_access_size()
67 static inline int decode_signedness(unsigned int insn) in decode_signedness() argument
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/openbmc/linux/arch/loongarch/kernel/
H A Dinst.c13 void simu_pc(struct pt_regs *regs, union loongarch_instruction insn) in simu_pc() argument
16 unsigned int rd = insn.reg1i20_format.rd; in simu_pc()
17 unsigned int imm = insn.reg1i20_format.immediate; in simu_pc()
24 switch (insn.reg1i20_format.opcode) { in simu_pc()
46 void simu_branch(struct pt_regs *regs, union loongarch_instruction insn) in simu_branch() argument
56 imm_l = insn.reg0i26_format.immediate_l; in simu_branch()
57 imm_h = insn.reg0i26_format.immediate_h; in simu_branch()
58 switch (insn.reg0i26_format.opcode) { in simu_branch()
68 imm_l = insn.reg1i21_format.immediate_l; in simu_branch()
69 imm_h = insn.reg1i21_format.immediate_h; in simu_branch()
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/openbmc/linux/arch/arm64/kernel/
H A Darmv8_deprecated.c48 u32 insn);
233 static bool try_emulate_swp(struct pt_regs *regs, u32 insn) in try_emulate_swp() argument
239 if ((insn & 0x0fb00ff0) != 0x01000090) in try_emulate_swp()
242 return swp_handler(regs, insn) == 0; in try_emulate_swp()
316 static bool try_emulate_cp15_barrier(struct pt_regs *regs, u32 insn) in try_emulate_cp15_barrier() argument
321 if ((insn & 0x0fff0fdf) == 0x0e070f9a) in try_emulate_cp15_barrier()
322 return cp15barrier_handler(regs, insn) == 0; in try_emulate_cp15_barrier()
324 if ((insn & 0x0fff0fff) == 0x0e070f95) in try_emulate_cp15_barrier()
325 return cp15barrier_handler(regs, insn) == 0; in try_emulate_cp15_barrier()
353 char *insn; in compat_setend_handler() local
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