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Searched refs:icc_sre_el1 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/intc/
H A Darm_gicv3_common.c126 cs->icc_sre_el1 = 0x7; in vmstate_gicv3_cpu_pre_load()
134 return cs->icc_sre_el1 != 7; in icc_sre_el1_reg_needed()
143 VMSTATE_UINT64(icc_sre_el1, GICv3CPUState),
H A Darm_gicv3_kvm.c461 kvm_gicc_access(s, ICC_SRE_EL1, ncpu, &c->icc_sre_el1, true); in kvm_arm_gicv3_put()
619 kvm_gicc_access(s, ICC_SRE_EL1, ncpu, &c->icc_sre_el1, false); in kvm_arm_gicv3_get()
690 c->icc_sre_el1 = 0x7; in arm_gicv3_icc_reset()
/openbmc/qemu/include/hw/intc/
H A Darm_gicv3_common.h160 uint64_t icc_sre_el1; member