Searched refs:hfsr (Results 1 – 5 of 5) sorted by relevance
38 uint32_t hfsr; /* offset 0x2C: HardFault Status Register */ member
654 s->cpu->env.v7m.hfsr |= R_V7M_HFSR_FORCED_MASK; in do_armv7m_nvic_set_pending()753 s->cpu->env.v7m.hfsr |= R_V7M_HFSR_FORCED_MASK; in armv7m_nvic_set_pending_lazyfp()1240 return cpu->env.v7m.hfsr; in nvic_readl()1786 cpu->env.v7m.hfsr &= ~value; /* W1C */ in nvic_writel()
523 VMSTATE_UINT32(env.v7m.hfsr, ARMCPU),
548 uint32_t hfsr; /* HardFault Status */ member
732 env->v7m.hfsr |= R_V7M_HFSR_VECTTBL_MASK; in arm_v7m_load_vector()734 env->v7m.hfsr |= R_V7M_HFSR_FORCED_MASK; in arm_v7m_load_vector()