Searched refs:has_priv_1_12 (Results 1 – 3 of 3) sorted by relevance
/openbmc/qemu/target/riscv/ |
H A D | cpu_cfg.h | 149 bool has_priv_1_12; member
|
H A D | cpu.c | 120 ISA_EXT_DATA_ENTRY(za64rs, PRIV_VERSION_1_12_0, has_priv_1_12), 193 ISA_EXT_DATA_ENTRY(sscounterenw, PRIV_VERSION_1_12_0, has_priv_1_12), 195 ISA_EXT_DATA_ENTRY(sstvala, PRIV_VERSION_1_12_0, has_priv_1_12), 196 ISA_EXT_DATA_ENTRY(sstvecd, PRIV_VERSION_1_12_0, has_priv_1_12),
|
/openbmc/qemu/target/riscv/tcg/ |
H A D | tcg-cpu.c | 327 cpu->cfg.has_priv_1_12 = true; in riscv_cpu_update_named_features() 338 cpu->cfg.has_priv_1_12; in riscv_cpu_update_named_features()
|