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Searched refs:glitch (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/sound/soc/intel/catpt/
H A Dipc.c150 struct catpt_notify_glitch glitch; in catpt_dsp_notify_stream() local
168 memcpy_fromio(&glitch, catpt_inbox_addr(cdev), sizeof(glitch)); in catpt_dsp_notify_stream()
169 trace_catpt_ipc_payload((u8 *)&glitch, sizeof(glitch)); in catpt_dsp_notify_stream()
172 glitch.type, glitch.presentation_pos, in catpt_dsp_notify_stream()
173 glitch.write_pos); in catpt_dsp_notify_stream()
/openbmc/u-boot/arch/x86/include/asm/arch-braswell/
H A Dgpio.h180 int_mask, glitch, inv_rx_tx, wake_mask, wake_mask_bit, gpe, \ argument
183 (((glitch) != NA) ? (glitch << 26) : 0) | \
191 (((glitch) != NA) ? (TWO_BIT << 26) : 0) | \
/openbmc/u-boot/doc/device-tree-bindings/leds/
H A Dleds-gpio.txt20 glitch should be produced where the LED momentarily turns off (or
22 state is, without producing a glitch. The default is off if this
/openbmc/linux/Documentation/hwmon/
H A Daspeed-g6-pwm-tach.rst25 affected by fan signal glitch.
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxl-mali.dtsi29 * MALI_0 and MALI_1 muxed to a single clock by a glitch
H A Dmeson-gxbb.dtsi247 * MALI_0 and MALI_1 muxed to a single clock by a glitch
680 * VPU_0 and VPU_1 muxed to a single clock by a glitch
682 * Same for VAPB but with a final gate after the glitch free mux.
H A Dmeson-gxl.dtsi681 * VPU_0 and VPU_1 muxed to a single clock by a glitch
683 * Same for VAPB but with a final gate after the glitch free mux.
/openbmc/linux/drivers/pinctrl/nomadik/
H A Dpinctrl-nomadik.c384 bool glitch) in __nmk_gpio_set_mode_safe() argument
389 if (glitch && nmk_chip->set_ioforce) { in __nmk_gpio_set_mode_safe()
401 if (glitch && nmk_chip->set_ioforce) { in __nmk_gpio_set_mode_safe()
1534 bool glitch; in nmk_pmx_set() local
1566 glitch = ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C); in nmk_pmx_set()
1568 if (glitch) { in nmk_pmx_set()
1610 (g->altsetting & NMK_GPIO_ALT_C), glitch); in nmk_pmx_set()
1630 if (glitch) { in nmk_pmx_set()
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb.dtsi763 * VPU_0 and VPU_1 muxed to a single clock by a glitch
765 * Same for VAPB but with a final gate after the glitch free mux.
H A Dmeson-gxl.dtsi833 * VPU_0 and VPU_1 muxed to a single clock by a glitch
835 * Same for VAPB but with a final gate after the glitch free mux.
H A Dmeson-axg.dtsi1242 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1244 * Same for VAPB but with a final gate after the glitch free mux.
H A Dmeson-g12-common.dtsi1648 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1650 * Same for VAPB but with a final gate after the glitch free mux.
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-delta-ahe50dc.dts395 * back to one causes a power output glitch, so install a hog to keep
/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst56 input de-glitch/debounce logic, sometimes with software controls.
H A Dlegacy.rst40 input de-glitch/debounce logic, sometimes with software controls.
275 setup of an output GPIO's value. This allows a glitch-free migration from a
632 initializing the value as low. To ensure glitch free
/openbmc/linux/Documentation/admin-guide/gpio/
H A Dsysfs.rst77 initializing the value as low. To ensure glitch free
/openbmc/u-boot/drivers/pinctrl/
H A DKconfig128 pin has a glitch filter providing rejection of glitches lower than
/openbmc/openbmc/poky/meta/recipes-core/ncurses/
H A Dncurses.inc74 --enable-xmc-glitch \
/openbmc/linux/Documentation/block/
H A Dbfq-iosched.rst107 do not suffer from almost any glitch due to the background workload.