Searched refs:gate_bit (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-pfdv2.c | 30 u8 gate_bit; member
59 val &= ~(1 << pfd->gate_bit); in clk_pfdv2_enable()
74 val |= (1 << pfd->gate_bit); in clk_pfdv2_disable()
146 if (readl_relaxed(pfd->reg) & (1 << pfd->gate_bit)) in clk_pfdv2_is_enabled()
218 pfd->gate_bit = (idx + 1) * 8 - 1; in imx_clk_hw_pfdv2()
219 pfd->vld_bit = pfd->gate_bit - 1; in imx_clk_hw_pfdv2()
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| /openbmc/linux/drivers/clk/ingenic/ |
| H A D | tcu.c | 39 u8 gate_bit; member
71 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
82 regmap_write(tcu->map, TCU_REG_TSSR, BIT(info->gate_bit)); in ingenic_tcu_disable()
93 return !(value & BIT(info->gate_bit)); in ingenic_tcu_is_enabled()
108 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable_regs()
119 regmap_write(tcu->map, TCU_REG_TSSR, BIT(info->gate_bit)); in ingenic_tcu_disable_regs()
248 .gate_bit = _gate_bit, \
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| /openbmc/u-boot/drivers/clk/altera/ |
| H A D | clk-arria10.c | 37 u8 gate_bit; member
88 clrbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
102 setbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
341 plat->gate_bit = gatereg[1]; in socfpga_a10_ofdata_to_platdata()
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-k210.c | 33 u8 gate_bit; member
51 .gate_bit = (_bit)
687 reg |= BIT(cfg->gate_bit); in k210_clk_enable()
707 reg &= ~BIT(cfg->gate_bit); in k210_clk_disable()
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| /openbmc/linux/drivers/clk/ti/ |
| H A D | adpll.c | 572 int output_index, int gate_bit, in ti_adpll_init_clkout() argument
611 if (gate_bit) { in ti_adpll_init_clkout()
614 co->gate.bit_idx = gate_bit; in ti_adpll_init_clkout()
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