Searched refs:fw_shared (Results 1 – 8 of 8) sorted by relevance
82 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_fw_shared_init() local84 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_3_fw_shared_init()85 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v4_0_3_fw_shared_init()86 fw_shared->sq.is_enabled = 1; in vcn_v4_0_3_fw_shared_init()183 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_sw_fini() local185 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_3_sw_fini()186 fw_shared->present_flag_0 = 0; in vcn_v4_0_3_sw_fini()187 fw_shared->sq.is_enabled = cpu_to_le32(false); in vcn_v4_0_3_sw_fini()231 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_hw_init() local257 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_3_hw_init()[all …]
127 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_init() local164 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_sw_init()165 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v4_0_sw_init()166 fw_shared->sq.is_enabled = 1; in vcn_v4_0_sw_init()168 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG); in vcn_v4_0_sw_init()169 fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ? in vcn_v4_0_sw_init()173 fw_shared->present_flag_0 |= AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT; in vcn_v4_0_sw_init()174 fw_shared->drm_key_wa.method = in vcn_v4_0_sw_init()179 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG); in vcn_v4_0_sw_init()215 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_fini() local[all …]
154 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_init() local224 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_init()225 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SW_RING_FLAG) | in vcn_v3_0_sw_init()228 fw_shared->sw_ring.is_enabled = cpu_to_le32(DEC_SW_RING_ENABLED); in vcn_v3_0_sw_init()229 fw_shared->present_flag_0 |= AMDGPU_VCN_SMU_VERSION_INFO_FLAG; in vcn_v3_0_sw_init()231 fw_shared->smu_interface_info.smu_interface_type = 2; in vcn_v3_0_sw_init()233 fw_shared->smu_interface_info.smu_interface_type = 1; in vcn_v3_0_sw_init()264 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_fini() local268 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_fini()269 fw_shared->present_flag_0 = 0; in vcn_v3_0_sw_fini()[all …]
100 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_0_sw_init() local181 fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_init()182 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG); in vcn_v2_0_sw_init()201 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_fini() local204 fw_shared->present_flag_0 = 0; in vcn_v2_0_sw_fini()377 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()379 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()468 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()471 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()797 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_start_dpg_mode() local[all …]
162 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_5_sw_init() local223 fw_shared = adev->vcn.inst[j].fw_shared.cpu_addr; in vcn_v2_5_sw_init()224 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG); in vcn_v2_5_sw_init()257 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_5_sw_fini() local263 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v2_5_sw_fini()264 fw_shared->present_flag_0 = 0; in vcn_v2_5_sw_fini()460 lower_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v2_5_mc_resume()462 upper_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v2_5_mc_resume()550 lower_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()553 upper_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()[all …]
204 adev->vcn.inst[i].fw_shared.cpu_addr = adev->vcn.inst[i].cpu_addr + in amdgpu_vcn_sw_init()206 adev->vcn.inst[i].fw_shared.gpu_addr = adev->vcn.inst[i].gpu_addr + in amdgpu_vcn_sw_init()209 adev->vcn.inst[i].fw_shared.mem_size = fw_shared_size; in amdgpu_vcn_sw_init()212 adev->vcn.inst[i].fw_shared.cpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()213 adev->vcn.inst[i].fw_shared.gpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()214 adev->vcn.inst[i].fw_shared.log_offset = log_offset; in amdgpu_vcn_sw_init()1079 if (!vcn->fw_shared.cpu_addr || !amdgpu_vcnfw_log) in amdgpu_debugfs_vcn_fwlog_read()1082 log_buf = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_debugfs_vcn_fwlog_read()1151 volatile uint32_t *flag = vcn->fw_shared.cpu_addr; in amdgpu_vcn_fwlog_init()1152 void *fw_log_cpu_addr = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()[all …]
253 struct amdgpu_vcn_fw_shared fw_shared; member
156 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v1_0_sw_init() local158 fw_shared->present_flag_0 = 0; in vcn_v1_0_sw_init()