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Searched refs:fw_based_mclk_switching (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c371 if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || in dcn30_fpu_update_soc_for_wm_a()
393 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; in dcn30_fpu_calculate_wm_and_dlg()
401 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = in dcn30_fpu_calculate_wm_and_dlg()
404 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn30_fpu_calculate_wm_and_dlg()
494 if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn30_fpu_calculate_wm_and_dlg()
569 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching && in dcn30_fpu_calculate_wm_and_dlg()
589 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) in dcn30_fpu_calculate_wm_and_dlg()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hwseq.c956 dc->current_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) && in dcn30_hardware_release()
981 …if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switchin… in dcn30_prepare_bandwidth()
998 if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) in dcn30_prepare_bandwidth()
1001 …if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switchin… in dcn30_prepare_bandwidth()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1374 …xt->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching; in dcn32_calculate_dlg_params()
2012 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; in dcn32_calculate_wm_and_dlg_fpu()
2024 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = true; in dcn32_calculate_wm_and_dlg_fpu()
2027 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn32_calculate_wm_and_dlg_fpu()
2058 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; in dcn32_calculate_wm_and_dlg_fpu()
2151 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn32_calculate_wm_and_dlg_fpu()
2170 if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching && !subvp_in_use) { in dcn32_calculate_wm_and_dlg_fpu()
3153 if ((context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dcn32_subvp_in_use(dc, context)) && in dcn32_override_min_req_memclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c815 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in get_mclk_switch_visual_confirm_color()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c2141 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) { in dcn20_optimize_bandwidth()
2145 dc->clk_mgr->clks.fw_based_mclk_switching = true; in dcn20_optimize_bandwidth()
2147 dc->clk_mgr->clks.fw_based_mclk_switching = false; in dcn20_optimize_bandwidth()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c562 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) in dcn32_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h558 bool fw_based_mclk_switching; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.c1829 context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; in dcn32_validate_bandwidth()
2012 if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || subvp_in_use) in dcn32_populate_dml_pipes_from_context()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1164 …xt->bw_ctx.bw.dcn.clk.p_state_change_support |= context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching; in dcn20_calculate_dlg_params()