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Searched refs:fw_based (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c1220 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v1_0_pause_dpg_mode()
1222 adev->vcn.inst[inst_idx].pause_state.fw_based, in vcn_v1_0_pause_dpg_mode()
1224 new_state->fw_based, new_state->jpeg); in vcn_v1_0_pause_dpg_mode()
1229 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v1_0_pause_dpg_mode()
1272 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v1_0_pause_dpg_mode()
1278 adev->vcn.inst[inst_idx].pause_state.fw_based, in vcn_v1_0_pause_dpg_mode()
1280 new_state->fw_based, new_state->jpeg); in vcn_v1_0_pause_dpg_mode()
1801 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v1_0_idle_work_handler()
1803 new_state.fw_based = VCN_DPG_STATE__UNPAUSE; in vcn_v1_0_idle_work_handler()
1863 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v1_0_set_pg_for_begin_use()
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H A Dvcn_v2_0.c1105 struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE}; in vcn_v2_0_stop_dpg_mode()
1209 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v2_0_pause_dpg_mode()
1211 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v2_0_pause_dpg_mode()
1215 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v2_0_pause_dpg_mode()
1272 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v2_0_pause_dpg_mode()
H A Dvcn_v4_0.c1431 struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE}; in vcn_v4_0_stop_dpg_mode()
1550 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v4_0_pause_dpg_mode()
1552 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v4_0_pause_dpg_mode()
1556 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v4_0_pause_dpg_mode()
1578 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v4_0_pause_dpg_mode()
H A Damdgpu_vcn.c382 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_idle_work_handler()
384 new_state.fw_based = VCN_DPG_STATE__UNPAUSE; in amdgpu_vcn_idle_work_handler()
430 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_ring_begin_use()
439 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_ring_begin_use()
441 new_state.fw_based = VCN_DPG_STATE__UNPAUSE; in amdgpu_vcn_ring_begin_use()
H A Dvcn_v3_0.c1493 struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE}; in vcn_v3_0_stop_dpg_mode()
1606 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v3_0_pause_dpg_mode()
1608 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v3_0_pause_dpg_mode()
1612 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v3_0_pause_dpg_mode()
1671 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v3_0_pause_dpg_mode()
H A Dvcn_v2_5.c1456 if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) { in vcn_v2_5_pause_dpg_mode()
1458 adev->vcn.inst[inst_idx].pause_state.fw_based, new_state->fw_based); in vcn_v2_5_pause_dpg_mode()
1462 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v2_5_pause_dpg_mode()
1517 adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based; in vcn_v2_5_pause_dpg_mode()
H A Damdgpu_vcn.h211 enum internal_dpg_state fw_based; member