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Searched refs:fuses (Results 1 – 25 of 44) sorted by relevance

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/openbmc/linux/drivers/nvmem/
H A Dapple-efuses.c15 void __iomem *fuses; member
25 *dst++ = readl_relaxed(priv->fuses + offset); in apple_efuses_read()
53 priv->fuses = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in apple_efuses_probe()
54 if (IS_ERR(priv->fuses)) in apple_efuses_probe()
55 return PTR_ERR(priv->fuses); in apple_efuses_probe()
/openbmc/linux/drivers/crypto/intel/qat/qat_c3xxx/
H A Dadf_c3xxx_hw_data.c29 u32 fuses = self->fuses; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET; in get_accel_mask()
41 u32 fuses = self->fuses; in get_ae_mask() local
52 return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK; in get_ae_mask()
H A Dadf_drv.c129 &hw_data->fuses); in adf_probe()
/openbmc/linux/drivers/crypto/intel/qat/qat_c62x/
H A Dadf_c62x_hw_data.c29 u32 fuses = self->fuses; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET; in get_accel_mask()
41 u32 fuses = self->fuses; in get_ae_mask() local
52 return ~(fuses | straps) & ADF_C62X_ACCELENGINES_MASK; in get_ae_mask()
H A Dadf_drv.c129 &hw_data->fuses); in adf_probe()
172 i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0; in adf_probe()
/openbmc/u-boot/doc/imx/common/
H A Dimx6.txt17 For reading the MAC address fuses on a MX6Q:
29 Base address for the fuses: 0x400
33 As the fuses are arranged in banks of 8 words:
50 Base address for the fuses: 0x400
54 As the fuses are arranged in banks of 8 words:
77 Rev. 1, 04/2013" document. For example, for the MAC fuses we have:
H A Dimx5.txt36 After programming a MAC address, consider locking the MAC fuses. This is
/openbmc/linux/drivers/crypto/intel/qat/qat_dh895xcc/
H A Dadf_dh895xcc_hw_data.c30 u32 fuses = self->fuses; in get_accel_mask() local
32 return ~fuses >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET & in get_accel_mask()
38 u32 fuses = self->fuses; in get_ae_mask() local
40 return ~fuses & ADF_DH895XCC_ACCELENGINES_MASK; in get_ae_mask()
100 int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) in get_sku()
H A Dadf_drv.c129 &hw_data->fuses); in adf_probe()
/openbmc/u-boot/drivers/misc/
H A Drockchip-efuse.c56 u8 fuses[128]; in dump_efuses() local
67 ret = misc_read(dev, 0, &fuses, sizeof(fuses)); in dump_efuses()
74 print_buffer(0, fuses, 1, 128, 16); in dump_efuses()
/openbmc/linux/drivers/pmdomain/qcom/
H A Dcpr.c808 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_populate_ring_osc_idx() local
812 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx()
813 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->ring_osc, &data); in cpr_populate_ring_osc_idx()
850 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_fuse_corner_init() local
871 for (i = 0; fuse <= end; fuse++, fuses++, i++, fdata++) { in cpr_fuse_corner_init()
881 uV = cpr_read_fuse_uV(desc, fdata, fuses->init_voltage, in cpr_fuse_corner_init()
901 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->quotient, &fuse->quot); in cpr_fuse_corner_init()
1078 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_corner_init() local
1176 quot_offset = fuses[fnum].quotient_offset; in cpr_corner_init()
1229 struct cpr_fuse *fuses; in cpr_get_fuses() local
[all …]
/openbmc/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen2_hw_data.c216 u32 fuses = hw_data->fuses; in adf_gen2_get_accel_cap() local
241 if ((straps | fuses) & ADF_POWERGATE_PKE) in adf_gen2_get_accel_cap()
244 if ((straps | fuses) & ADF_POWERGATE_DC) in adf_gen2_get_accel_cap()
H A Dadf_accel_devices.h220 u32 fuses; member
/openbmc/u-boot/doc/
H A DREADME.fuse13 A fuse word is the smallest group of fuses that can be read at once from the
36 This is useful to know the true value of fuses if an override has been
61 fuses have already been programmed or are locked (if the SoC allows to
H A DREADME.fsl_iim18 Some fuse bit or word slots may not have the corresponding fuses actually
22 conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
H A DREADME.mxc_ocotp21 Some fuse bit or word slots may not have the corresponding fuses actually
25 conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/crucible/
H A Dcrucible_2023.11.02.bb1 SUMMARY = "Utility that provides userspace support for reading and writing to the i.MX fuses"
/openbmc/u-boot/arch/arm/mach-imx/
H A DKconfig75 bool "Read NXP board revision from fuses"
79 stored in the fuses. Select this option if you want to be able to
/openbmc/u-boot/doc/imx/habv4/guides/
H A Dmx6_mx7_secure_boot.txt141 SoC SRK_HASH[255:0] fuses.
148 - Dump SRK Hash fuses values in host machine:
160 - Program SRK_HASH[255:0] fuses, using i.MX6 series as example:
246 Additional fuses can be programmed for completely secure the device, more
247 details about these fuses and their possible impact can be found at AN4581[1].
/openbmc/u-boot/board/toradex/colibri_imx6/
H A DKconfig38 pf0100_otp_prog - Program the OTP fuses on the PMIC PF0100
/openbmc/linux/Documentation/devicetree/bindings/cpufreq/
H A Dimx-cpufreq-dt.txt5 "speed grading" value which are written in fuses. These bits are combined with
/openbmc/u-boot/board/toradex/apalis_imx6/
H A DKconfig38 pf0100_otp_prog - Program the OTP fuses on the PMIC PF0100
/openbmc/u-boot/board/boundary/nitrogen6x/
H A DREADME.mx6qsabrelite44 from the fuses.
118 6. Ensure SW1 is returned to "00" to boot from the fuses once done.
/openbmc/u-boot/doc/imx/habv4/
H A Dintroduction_habv4.txt33 binary and the SRK Hash is programmed in the SoC fuses for establishing the
235 SRK Hash is programmed in the SoC SRK_HASH[255:0] fuses.
238 SRK Table against the SoC SRK_HASH fuses, in case the verification success the
/openbmc/u-boot/arch/arm/dts/
H A Dtegra30.dtsi826 nvidia.xcvr-setup-use-fuses;
863 nvidia.xcvr-setup-use-fuses;
899 nvidia.xcvr-setup-use-fuses;

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